IP2005ATRPBF ,High Frequency Synchronous Buck Optimized LGA Power Stage with Integrated Power Semiconductors, Driver IC, & Passivesapplications where component integration offers QuantityDescription Connection Orientationbenefits ..
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IP3088CX15 ,Integrated 2, 4, 6 and 8-channel passive LC-filter network with ESD protection to IEC61000-4-2 level 4Pin configuration IP3088CX202.2 Pin description Table 1. Pinning Pin DescriptionIP3088CX5 IP3088CX1 ..
IP3101 , Versatile Gate Driver
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IP2005ATRPBF
High Frequency Synchronous Buck Optimized LGA Power Stage with Integrated Power Semiconductors, Driver IC, & Passives
International
tatRectifier
PD-60325
iP2005APbF
iP0WIR"1
Features
TECHNOLOGY
40A Multiphase building block
No de-rating up to FOB = 95°C
Optimized for low power loss
Optimized for low EMI
Bias supply range of4.5V to 7.0V
Operation up to 1.5MHz
Bi-directional Current flow
Under Voltage Lockout
LGA interface
7.65mm x 7.65mm outline
Applications
High Frequency, Low Profile DC-DC
Multi-phase Architectures
Low Duty Cycle, High Current solutions
Microprocessor Power Supplies
General DC/DC Converters
High Frequency Synchronous Buck
Optimized LGA Power Stage
Integrated Power Semiconductors, Driver IC, & Passives
Description
The iP2005A is a fully optimized solution for high current
synchronous buck multiphase applications. Board space
and design time are greatly reduced because most of
the components required for each phase of a typical
discrete-based multiphase circuit are integrated into a
single 7.65mm x 7.65mm x 1.66mm power block. The
additional components required for a complete
multiphase converter are a PWM controller, the output
inductors, and the input and output capacitors.
iPOWIR Technology offers designers an innovative
board space saving solution for applications requiring
high power densities. iPOWIR technology eases design
Paclfage lnterfaee Standard _T&R_ for applications where component integration offers
Description Connection Quantity Orientation benefits in performance and functionality. iPOWIR
iP2005APbF LGA 10 NIA technology solutions are also optimized internally for
iP2005ATRPbF LGA 2000 Figure 15 layout, heat transfer, and component selection.
Typical Application iP2005A Product Efficiency
vIN = 12V, Fsw = 1MHz, & TBLK = 125°C
Efficiency (%)
4 6 810121416182022242628303234363840
Output Current (A)
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2/8/2008 1
International
TitatRectifier
PD-60325
iP2005APbF
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to PGND)
vIN to PGND _....................................) to 16.5V
VDD to PGND .................................... -0.51/ to 7.5V
CI/cc to PGND o.................................-) to 7.5V
PWM to PGND .................................. -0.5V to VDD + 0.5V (Note 1)
ENABLE to PGND .............................
Storage Temperature .......................
Block Temperature ..........................
-0.5V to VDD + 0.5V (Note 1)
-60°C to 150°C
-40°C to 150°C (Note 2)
...................................... JEDEC, JESD22-A115 (MM[400V], Class C)
ESD Rating ..................................... JEDEC, JESD22-A114 (HBM[4KV], Class 3A)
MSL Rating..-......--.......:.
Reflow Temperature ......................... 260°C Peak
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those listed in the "Recommended
Operating Conditions" section of this specification is not implied.
Recommended Operating Conditions
PARAMETER MIN TYP MAX UNITS CONDITIONS
Supply Voltage (VDD) 4.5 - 7.0 V
Input Voltage (VIN) 6.5 - 13.2 V
Output Voltage (VOUT) - - 5.5 V
Output Current (IOUT) - - 40 A
Switching Frequency 250 - 1500 kHz
On Time Duty Cycle - - 85 %
Minimum I/sw On Time 60 - - ns Va, = 5.0V, VIN = 12V
Block Temperature (TBLK) -40 - 125 °C (Note 2)
2/8/2008 2
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