ICE3A1565 ,Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power SuppliesFeatures DescriptionThe new generation CoolSET™-F3 provides Active Burst 650V avalanche rugged Co ..
ICE3A1565 . ,Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power Suppliesfeatures (Auto Restart Mode) to increase robustness and safety of the system Adjustable Blanking W ..
ICE3A1565L , Off-Line SMPS Current Mode Controller with integrated 650V Startup Cell/Depletion CoolMOS™ and Latched off Mode
ICE3A2065 ,Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power SuppliesFeatures DescriptionThe new generation CoolSET™-F3 provides Active Burst 650V avalanche rugged Co ..
ICE3A2065 ,Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power Suppliesfeatures (Auto Restart Mode) to increase robustness and safety of the system Adjustable Blanking W ..
ICE3A2065P ,Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power SuppliesapplicationsP-TO220-6-47P-TO220-6-47
IDT71V35761S183PF , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
IDT71V35761S200BG , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
IDT71V35761S200PF , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
IDT71V3576YS150PF , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
IDT71V3578 , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
IDT71V35781S200BG , 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
ICE3A0365-ICE3A0565-ICE3A0565Z-ICE3A1065-ICE3A1565-ICE3A1565 .-ICE3A2065-ICE3A2065P-ICE3A2065Z-ICE3A2565-ICE3A3065P-ICE3A3565P-ICE3A5065P-ICE3A5565P-ICE3B0365-ICE3B0565-ICE3B0565 .-ICE3B1065-ICE3B1565-ICE3B2065-ICE3B2065P-ICE3B2565-ICE3B3065P-ICE3B5
Third Generation Fixed Frequency Intergrated Power ICs for Switched Mode Power Supplies
CoolSET™-F3
ICE3A(B)0365/0565/1065/1565
ICE3A(B)2065/2565
ICE3A0565Z/2065Z
ICE3A(B)2065I/3065I/3565I
ICE3A(B)5065I/5565I
ICE3A(B)2065P/3065P/3565P
ICE3A(B)5065P/5565POff-Line SMPS Current Mode
Controller with integrated 650V
Startup Cell/CoolMOS™
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or
the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://
www.infineon.com
CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.
CoolSET™-F3
Revision History: 2004-09-15 Datasheet
Previous Version:
Version 1.3 3 15 Sep 2004
CoolSET™-F3
Off-Line SMPS Current Mode Controller
with integrated 650V Startup Cell/
CoolMOS™
Product HighlightsBest in class in DIP7, DIP8, TO220, I2Pak packagesLeadfree for DIP7 and DIP8 packagesActive Burst Mode to reach the lowest Standby Power
Requirements < 100mWProtection features (Auto Restart Mode) to increase
robustness and safety of the systemAdjustable Blanking Window for high load jumps to
increase system reliabilityIsolated drain package for TO220/I2PAKIncreased creepage distance for TO220/I2PAKWide power class of products for various applications
Features650V avalanche rugged CoolMOS™ with built in
switchable Startup Cell Active Burst Mode for lowest Standby Power
@ light load controlled by Feedback signalFast load jump response in Active Burst Mode67/100 kHz fixed switching frequencyAuto Restart Mode for Overtemperature DetectionAuto Restart Mode for Overvoltage DetectionAuto Restart Mode for Overload and Open LoopAuto Restart Mode for VCC UndervoltageBlanking Window for short duration high currentUser defined Soft Start Minimum of external components requiredMax Duty Cycle 72% Overall tolerance of Current Limiting < ±5%Internal PWM Leading Edge BlankingSoft switching for low EMI
DescriptionThe new generation CoolSET™-F3 provides Active Burst
Mode to reach the lowest Standby Power Requirements
<100mW at no load. As the controller is always active
during Active Burst Mode, there is an immediate response
on load jumps without any black out in the SMPS. In Active
Burst Mode the ripple of the output voltage can be reduced
<1%. Furthermore, to increase the robustness and safety
of the system, the device enters into Auto Restart Mode in
the cases of Overtemperature, VCC Overvoltage, Output
Open Loop or Overload and VCC Undervoltage. By means
of the internal precise peak current limitation, the
dimension of the transformer and the secondary diode can
be lowered which leads to more cost efficiency. An
adjustable blanking window prevents the IC from entering
Auto Restart or Active Burst Mode unintentionally during
high load jumps. The CoolSET™-F3 family consists a wide
power class range of products for various applications.
Version 1.3 4 15 Sep 2004
Ordering Codestyp @ T=25°CCalculated maximum input power rating at Ta=75°C, Tj=125°C and without copper area as heat sink.typ @ T=25°CCalculated maximum input power rating at Ta=75°C, Tj=125°C and without copper area as heat sink.
Version 1.3 5 15 Sep 2004typ @ T=25°CCalculated maximum continuous input power in an open frame design at Ta=50°C, Tj=125°C and RthCA(external heatsink)=2.7K/W
Table of ContentsPageVersion 1.3 6 15 Sep 2004
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71.1Pin Configuration with PG-DIP-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.2Pin Configuration with PG-DIP-7-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.3Pin Configuration with P-TO220-6-46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.4Pin Configuration with P-TO220-6-47 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.5Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.2Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.3Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.4PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.4.1Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.4.2PWM-Latch FF1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.4.3Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.5Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.5.1Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.5.2Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.6Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.6.1Adjustable Blanking Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.6.2Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.2.1Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.2.2Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.2.3Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.3Protection Mode (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .194.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3.1Supply Section 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3.2Supply Section 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.3.3Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
4.3.4PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
4.3.5Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
4.3.6Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
4.3.7CoolMOS™ Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Version 1.3 7 15 Sep 2004Pin Configuration and Functionality
1.1Pin Configuration with PG-DIP-8-6
Figure 1Pin Configuration PG-DIP-8-6(top view)
Note: Pin 4 and 5 are shorted within the DIP 8 package.
1.2Pin Configuration with PG-DIP-7-1
Figure 2Pin Configuration PG-DIP-7-1(top view) at Tj = 110°C at Tj = 110°C
Version 1.3 8 15 Sep 2004
Figure 3Pin Configuration P-TO220-6-46(top view)
1.4Pin Configuration with P-TO220-6-47
Figure 4Pin Configuration P-TO220-6-47(top view)
1.3Pin Configuration with P-TO220-6-46 at Tj = 110°C at Tj = 110°C
Version 1.3 9 15 Sep 2004
1.5Pin Functionality
SoftS (Soft Start & Auto Restart Control)
The SoftS pin combines the functions of Soft Start
during Start Up and error detection for Auto Restart
Mode. These functions are implemented and can be
adjusted by means of an external capacitor at SoftS to
ground. This capacitor also provides an adjustable
blanking window for high load jumps, before the IC
enters into Auto Restart Mode.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle. The FB-
Signal controls in case of light load the Active Burst
Mode of the controller.
CS (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated Depl-CoolMOS™. If CS reaches the internal
threshold of the Current Limit Comparator, the Driver
output is immediately switched off. Furthermore the
current information is provided for the PWM-
Comparator to realize the Current Mode.
Drain (Drain of integrated Depl-CoolMOS™)
Pin Drain is the connection to the Drain of the internal
Depl-CoolMOSTM.
VCC (Power supply)
The VCC pin is the positive supply of the IC. The
operating range is between 8.5V and 21V.
GND (Ground)
The GND pin is the ground of the controller.
Version 1.3 10 15 Sep 2004Representative Blockdiagram
Figure 5Representative Blockdiagram
Version 1.3 11 15 Sep 2004Functional Description
All values which are used in the functional description
are typical values. For calculating the worst cases the
min/max values which can be found in section 4
Electrical Characteristics have to be considered.
3.1Introduction
CoolSET™-F3 is the further development of the
CoolSET™-F2 to meet the requirements for the lowest
Standby Power at minimum load and no load
conditions. A new fully integrated Standby Power
concept is implemented into the IC in order to keep the
application design easy. Compared to CoolSET™-F2
no further external parts are needed to achieve the
lowest Standby Power. An intelligent Active Burst
Mode is used for this Standby Mode. After entering this
mode there is still a full control of the power conversion
by the secondary side via the same optocoupler that is
used for the normal PWM control. The response on
load jumps is optimized. The voltage ripple on Vout is
minimized. Vout is further on well controlled in this
mode.
The usually external connected RC-filter in the
feedback line after the optocoupler is integrated in the
IC to reduce the external part count.
Furthermore a high voltage Startup Cell is integrated
into the IC which is switched off once the Undervoltage
Lockout on-threshold of 15V is exceeded. This Startup
Cell is part of the integrated Depl-CoolMOS™. The
external startup resistor is no longer necessary as this
Startup Cell is connected to the Drain. Power losses
are therefore reduced. This increases the efficiency
under light load conditions drastically.
The Soft-Start capacitor is also used for providing an
adjustable blanking window for high load jumps. During
this time window the overload detection is disabled.
With this concept no further external components are
necessary to adjust the blanking window.
An Auto Restart Mode is implemented in the IC to
reduce the average power conversion in the event of
malfunction or unsafe operating condition in the SMPS
system. This feature increases the system’s
robustness and safety which would otherwise lead to a
destruction of the SMPS. Once the malfunction is
removed, normal operation is automatically initiated
after the next Start Up Phase.
The internal precise peak current limitation reduces the
costs for the transformer and the secondary diode. The
influence of the change in the input voltage on the
power limitation can be avoided together with the
integrated Propagation Delay Compensation.
Therefore the maximum power is nearly independent
on the input voltage which is required for wide range
SMPS. There is no need for an extra over-sizing of the
SMPS, e.g. the transformer or the secondary diode.
3.2Power Management
Figure 6Power Management
The Undervoltage Lockout monitors the external
supply voltage VVCC. When the SMPS is plugged to the
main line the internal Startup Cell is biased and starts
to charge the external capacitor CVCC which is
connected to the VCC pin. This VCC charge current
which is provided by the Startup Cell from the Drain pin
is 1.05mA. When VVCC exceeds the on-threshold
VCCon=15V the internal voltage reference and bias
circuit are switched on. Then the Startup Cell is
switched off by the Undervoltage Lockout and therefore
no power losses present due to the connection of the
Startup Cell to the Drain voltage. To avoid uncontrolled
ringing at switch-on a hysteresis is implemented. The
switch-off of the controller can only take place after
Active Mode was entered and VVCC falls below 8.5V.
The maximum current consumption before the
controller is activated is about 160µA.
When VVCC falls below the off-threshold VCCoff=8.5V the
internal reference is switched off and the Power Down
reset let T1 discharging the soft-start capacitor CSoftS at
pin SoftS. Thus it is ensured that at every startup cycle
the voltage ramp at pin SoftS starts at zero.
The internal Voltage Reference is switched off if Auto
Restart Mode is entered. The current consumption is
then reduced to 300µA.
Version 1.3 12 15 Sep 2004
Once the malfunction condition is removed, this block
will then turn back on. The recovery from Auto Restart
Mode does not require disconnecting the SMPS from
the AC line
When Active Burst Mode is entered, the internal Bias is
switched off in order to reduce the current consumption
to below 1.05mA while keeping the Voltage Reference
active as this is necessary in this mode.
3.3Startup Phase
Figure 7Soft Start
At the beginning of the Startup Phase, the IC provides
a Soft Start duration whereby it controls the maximum
primary current by means of a duty cycle limitation. A
signal VSoftS which is generated by the external
capacitor CSofts in combination with the internal pull up
resistor RSoftS, determines the duty cycle until VSoftS
exceeds 4V.
When the Soft Start begins, CSoftS is immediately
charged up to approx. 1V by T2. Therefore the Soft
Start Phase takes place between 1V and 4V. Above
VSoftsS = 4V there is no longer duty cycle limitation
DCmax which is controlled by comparator C7 since
comparator C2 blocks the gate G7 (see Figure 6). This
maximum charge current in the very first stage when
VSoftS is below 1V, is limited to 1.32mA.
Figure 8Startup Phase
By means of this extra charge stage, there is no delay
in the beginning of the Startup Phase when there is still
no switching. Furthermore Soft Start is finished at 4V to
have faster the maximum power capability. The duty
cycles DC1 and DC2 are depending on the mains and
the primary inductance of the transformer. The
limitation of the primary current by DC2 is related to
VSoftS = 4V. But DC1 is related to a maximum primary
current which is limited by the internal Current Limiting
with CS = 1V. Therefore the maximum Startup Phase
is divided into a Soft Start Phase until t1 and a phase
from t1 until t2 where maximum power is provided if
demanded by the FB signal.
Version 1.3 13 15 Sep 2004
3.4PWM Section
Figure 9PWM Section
3.4.1Oscillator
The oscillator generates a fixed frequency. The
switching frequency of ICE3Axx65x is fOSC = 100kHz
and for ICE3Bxx65x fOSC = 67kHz. A resistor, a
capacitor and a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of Dmax=0.72.
3.4.2PWM-Latch FF1
The oscillator clock output provides a set pulse to the
PWM-Latch when initiating the external Power Switch
conduction. After setting the PWM-Latch can be reset
by the PWM comparator, the Soft Start comparator or
the Current-Limit comparator. In case of resetting, the
driver is shut down immediately.
3.4.3Gate Driver
Figure 10Gate Driver
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing
the switch on slope when exceeding the internal
CoolMOS™ threshold. This is achieved by a slope
control of the rising edge at the driver’s output (see
Figure 10).
Figure 11Gate Rising Slope
Thus the leading switch on spike is minimized. When
the integrated CoolMOS™ is switched off, the falling
shape of the driver is slowed down when reaching 2V
to prevent an overshoot below ground. Furthermore the
driver circuit is designed to eliminate cross conduction
of the output stage. During powerup when VCC is
below the undervoltage lockout threshold VVCCoff, the
output of the Gate Driver is low to disable power
transfer to the seconding side.
Version 1.3 14 15 Sep 2004
3.5Current Limiting
Figure 12Current Limiting Block
There is a cycle by cycle Current Limiting realized by
the Current-Limit comparator C10 to provide an
overcurrent detection. The source current of the
external Power Switch is sensed via an external sense
resistor RSense . By means of RSense the source current
is transformed to a sense voltage VSense which is fed
into the pin CS. If the voltage VSense exceeds the
internal threshold voltage Vcsth the comparator C10
immediately turns off the gate drive by resetting the
PWM Latch FF1. A Propagation Delay Compensation
is added to support the immediate shut down without
delay of the Power Switch in case of Current Limiting.
The influence of the AC input voltage on the maximum
output power can thereby be avoided.
To prevent the Current Limiting from distortions caused
by leading edge spikes a Leading Edge Blanking is
integrated in the current sense path for the
comparators C10, C12 and the PWM-OP.
The output of comparator C12 is activated by the Gate
G10 if Active Burst Mode is entered. Once activated the
current limiting is thereby reduced to 0.257V. This
voltage level determines the power level when the
Active Burst Mode is left if there is a higher power
demand.
3.5.1Leading Edge Blanking
Figure 13Leading Edge Blanking
Each time when the external Power Switch is switched
on, a leading edge spike is generated due to the
primary-side capacitances and secondary-side rectifier
reverse recovery time. This spike can cause the gate
drive to switch off unintentionally. To avoid a premature
termination of the switching pulse, this spike is blanked
out with a time constant of tLEB = 220ns. During this
time, the gate drive will not be switched off.
3.5.2Propagation Delay Compensation
In case of overcurrent detection, the switch-off of the
external Power Switch is delayed due to the
propagation delay of the circuit. This delay causes an
overshoot of the peak current Ipeak which depends on
the ratio of dI/dt of the peak current (see Figure 13).
Figure 14Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform. This change in the
slope is depending on the AC input voltage.
Propagation Delay Compensation is integrated to limit
the overshoot dependency on dI/dt of the rising primary
current. That means the propagation delay time
between exceeding the current sense threshold Vcsth
and the switch off of the external Power Switch is
compensated over temperature within a wide range.
Version 1.3 15 15 Sep 2004
Current Limiting is now possible in a very accurate way.
E.g. Ipeak = 0.5A with RSense = 2. Without Propagation
Delay Compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. tPropagation Delay =180ns
leads then to an Ipeak overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 14).
Figure 15Overcurrent Shutdown
The Propagation Delay Compensation is realized by
means of a dynamic threshold voltage Vcsth (see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
Figure 16Dynamic Voltage Threshold Vcsth
3.6Control Unit
The Control Unit contains the functions for Active Burst
Mode and Auto Restart Mode. The Active Burst Mode
and the Auto Restart Mode are combined with an
Adjustable Blanking Window which is depending on the
external Soft Start capacitor. By means of this
Adjustable Blanking Window, the IC avoids entering
into these two modes accidentally. Furthermore it also
provides a certain time whereby the overload detection
is delayed. This delay is useful for applications which
normally works with a low current and occasionally
require a short duration of high current.
3.6.1Adjustable Blanking Window
Figure 17Adjustable Blanking Window
VSoftS is clamped at 4.4V by the closed switch S1 after
the SMPS is settled. If overload occurs VFB is
exceeding 4.8V. Auto Restart Mode can’t be entered as
the gate G5 is still blocked by the comparator C3. But
after VFB has exceeded 4.8V the switch S1 is opened
