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ICE1PCS01-ICE1PCS01.-ICE1PCS01G
Power Control ICs
CCM-PFC
ICE1PCS01
ICE1PCS01G
Standalone Power Factor
Correction (PFC) Controller in
Continuous Conduction Mode
(CCM)
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CCM-PFC
Revision History:2003-05-28Datasheet
Previous Version:v1.0
CCM-PFC
ICE1PCS01ICE1PCS01G
Preliminary Data
Standalone Power Factor Correction
(PFC) Controller in Continuous
Conduction Mode (CCM)
Product HighlightsWide Input RangeOutput Power Controllable by External Sense
ResistorProgrammable Operating Frequency Output Under-Voltage DetectionFast Output Dynamic Response during Load
FeaturesEase of Use with Few External ComponentsSupports Wide Range Average Current ControlExternal Current and Voltage Loop Compensation
for Greater User FlexibilityProgrammable Operating/Switching Frequency
(50kHz - 250kHz)Max Duty Cycle of 95% (typ) at 125kHzTrimmed Internal Reference Voltage (5V+2%)VCC Under-Voltage LockoutCycle by Cycle Peak Current LimitingOver-Voltage ProtectionOpen Loop DetectionOutput Under-Voltage DetectionBrown-Out ProtectionEnhanced Dynamic ResponseUnique Soft-Start to Limit Start Up CurrentFulfills Class D Requirements of IEC 1000-3-2
DescriptionThe ICE1PCS01/G is a 8-pin wide input range controller
IC for active power factor correction converters. It is de-
signed for converters in boost topology, and requires few
external components. Its power supply is recommended
to be provided by an external auxiliary supply which will
switch on and off the IC.
The IC operates in the CCM with average current control,
and in DCM only under light load condition. The switching
frequency is programmable by the resistor at pin 4. Both
compensations for the current and voltage loop are exter-
nal to allow full user control.
There are various protection features incorporated to en-
sure safe system operation conditions. Examples are
peak current limitation, brown-out protection and output
under voltage detection. The internal reference is trimmed
(5V+2%) to ensure precise protection and control level.
The device has an unique soft-start function which limits
the start up current thus reducing the stress on the boost
diode.
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51.1Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.2Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Representative Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73.1General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.2Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.3Start-up (Soft-Start) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.4System Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.4.1Brown-Out Protection (BOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.4.2Soft Over Current Control (SOC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.4.3Peak Current Limit (PCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.4.4Open Loop Protection / Input Under Voltage Protect (OLP) . . . . . . . . . . .9
3.4.5Output Under Voltage Detection (OUV) . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.4.6Over-Voltage Protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.5Frequency Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6Average Current Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6.1Complete Current Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6.2Current Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6.3Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6.4Nonlinear Gain Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.7PWM Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.8Voltage Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.8.1Voltage Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.8.2Enhanced Dynamic Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.9Output Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.2Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.3Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.3.1Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.3.2Variable Frequency Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.3.3PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.3.4System Protection Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.3.5Current Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3.6Voltage Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3.7Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Pin Configuration and Functionality1.1Pin Configuration
Figure 1Pin Configuration (top view)
1.2Pin Functionality
GND (Ground)
The ground potential of the IC.
ICOMP (Current Loop Compensation)
Low pass filter and compensation of the current control
loop. The capacitor which is connected at this pin
integrates the output current of OTA2 and averages the
current sense signal.
ISENSE (Current Sense Input)
The ISENSE Pin senses the voltage drop at the
external sense resistor (R1). This is the input signal for
the average current regulation in the current loop. It is
also fed to the peak current limitation block.
During power up time, high inrush currents cause high
voltage drop at R1, driving currents into pin 3 which
could be beyond the absolute maximum ratings.
Therefore a series resistor (R2) of around 220Ω is
recommended in order to limit this current into the IC.
FREQ (Frequency Setting)
This pin allows the setting of the operating switching
frequency by connecting a resistor to ground. The
frequency range is from 50kHz to 250kHz.
VSENSE (Voltage Sense/Feedback)
The output bus voltage is sensed at this pin via a
resistive divider. The reference voltage for this pin is
5V.
VCOMP (Voltage Loop Compensation)
This pin provides the compensation of the output
voltage loop with a compensation network to ground
(see Figure 2). This also gives the soft start function
which controls an increasing AC input current during
start-up.
VCC (Power Supply)
The VCC pin is the positive supply of the IC and should
be connected to an external auxiliary supply. The
operating range is between 10V and 21V. The turn-on
threshold is at 11.2V and under voltage occurs at
10.2V. There is no internal clamp for a limitation of the
power supply.
GATE
The GATE pin is the output of the internal driver stage,
which has a capability of 1.5A source and sink current.
Its gate drive voltage is clamped at 11.5V (typically).
Representative Block diagram
3.1General
The ICE1PCS01/G is a 8 pin control IC for power factor
correction converters. It comes in both DIP and DSO
packages and is suitable for wide range line input
applications from 85 to 265 VAC. The IC supports
converters in boost topology and it operates in
continuous conduction mode (CCM) with average
current control.
The IC operates with a cascaded control; the inner
current loop and the outer voltage loop. The inner
current loop of the IC controls the sinusoidal profile for
the average input current. It uses the dependency of
the PWM duty cycle on the line input voltage to
determine the corresponding input current. This means
the average input current follows the input voltage as
long as the device operates in CCM. Under light load
condition, depending on the choke inductance, the
system may enter into discontinuous conduction mode
(DCM). In DCM, the average current waveform will be
distorted but the resultant harmonics are still low
enough to meet the Class D requirement of IEC 1000-
The outer voltage loop controls the output bus voltage.
Depending on the load condition, OTA1 establishes an
appropriate voltage at VCOMP pin which controls the
amplitude of the average input current.
The IC is equipped with various protection features to
ensure safe operating condition for both the system
and device. Important protection features are namely
Brown-out protection, Current Limitation and Output
Under-voltage Protection.
3.2Power Supply
An internal under voltage lockout (UVLO) block
monitors the VCC power supply. As soon as it exceeds
11.2V and the voltage at pin 6 (VSENSE) is >0.8V, the
IC begins operating its gate drive and performs its Soft-
Start as shown in Figure 3.
Figure 3State of Operation respect to VCC
If VCC drops below 10.2V, the IC is off. The IC will then
be consuming typically 200µA, whereas consuming
18mA during normal operation.
The IC can be turned off and forced into standby mode
by pulling down the voltage at pin 6 (VSENSE) to lower
than 0.8V. The current consumption is reduced to 3mA
in this mode.
3.3Start-up (Soft-Start)
Figure 4 and 5 show the operation of OTA1 during
startup. It sources a constant 10.8µA into the
compensation network at pin 5 (VCOMP). The voltage
at this pin rises linearly and so does the amplitude of
the input current. As soon as the output voltage VOUT reaches 80% of its rated level, the startup procedure is
finished and the normal voltage control takes over. In
normal operation, the IC operates with a higher
maximum current at OTA1 and therefore with a higher
voltage loop gain in order to improve the dynamic
behavior of the device.
Figure 4Soft Start Circuit
Figure 5Soft Start with controlled current
The advantage of this technique is a soft-start function
with lower stress for the boost diode but without the risk
Functional Description
3.4System Protection
The IC provides several protection features in order to
ensure the PFC system in safe operating range.
Depending on the input line voltage (VIN) and output
bus voltage (VOUT), Figure 6 and 7 show the conditions
when these protections are active.
Figure 6VIN Related Protection Features
Figure 7VOUT Related Protection Features
The following sections describe the functionality of
these protection features.
3.4.1Brown-Out Protection (BOP)
Brown-out occurs when the input voltage VIN falls below
the minimum input voltage of the design (i.e. 85V for
universal input voltage range) and the VCC has not
entered into the VCCUVLO level yet. For a system without
BOP, the boost converter will increasingly draw a
higher current from the mains at a given output power
which may exceed the maximum design values of the
input current. The ICE1PCS01/G limits internally the
current drawn from the mains and therefore also limits
the input power. The difference of input and output
power will result in decreasing output voltage. If the
condition prolongs, the decreasing VOUT will terminate
in output under voltage condition (OUV, 50% of rated),
and the IC will be shut down (See section 3.4.5).
Figure 8 shows the occurrence of BOP in respect to the
ISENSE voltage.
Figure 8BOP, SOC and PCL Protection as function
of VISENSE
The VIN threshold for BOP to occur is dependent on the
voltage at ISENSE and thus the output power. The
rated output power with a minimum VIN (VINMIN) is
Due to the internal parameter tolerance, the maximum
power with VINMIN before BOP occurs is
And the BOP takes over the normal operation under
rated output power latest at an input voltage of
3.4.2Soft Over Current Control (SOC)
The IC is designed not to support any output power
that corresponds to a voltage lower than -0.73V at the
ISENSE pin. A further increase in the inductor current,
which results in a lower ISENSE voltage, will activate
the Soft Over Current Control (SOC). This is a soft
control as it does not directly switch off the gate drive
like the PCL. It acts on the nonlinear gain block to result
in a reduced PWM duty cycle.
3.4.3Peak Current Limit (PCL)
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 3 (ISENSE)
reaches -1.08V. This voltage is amplified by OP1 by a
factor of -1.43 and connected to comparator C2 with a
reference voltage of 1.5V as shown in Figure 9. A
deglitcher with 300ns after the comparator improves
noise immunity to the activation of this protection.OUTrated()VINMIN0.6⋅
---------------------×=OUTmax()VINMIN0.73⋅
-------------------×=BOPMAXPOUTrated()R1⋅
0.73---------------------×=
Figure 9Peak Current Limit (PCL)
3.4.4Open Loop Protection / Input Under
Voltage Protect (OLP)
Whenever VSENSE voltage falls below 0.8V, or
equivalently VOUT falls below 16% of its rated value, it
indicates an open loop condition (i.e. VSENSE pin not
connected) or an insufficient input voltage VIN for
normal operation. In this case, most of the blocks within
the IC will be shutdown. It is implemented using
comparator C3 with a threshold of 0.8V as shown in the
IC block diagram in Figure 2.
3.4.5Output Under Voltage Detection (OUV)
In the event of main interrupt or brown-out condition,
the PFC system is not able to deliver the rated output
power. This will cause the output voltage VOUT to drop
below its rated value. The IC provides an output under
voltage detection that checks if VOUT is falling below
50% of its rated value. Comparator C4 as shown in the
device block diagram (Figure 2) senses the voltage at
pin 6 (VSENSE) with a reference of 2.5V. If comparator
C4 trips, the IC will be shut down as in OLP. The IC will
be ready to restart if there is sufficient VIN to pull VOUT
out of OLP.
3.4.6Over-Voltage Protection (OVP)
Whenever VOUT exceeds the rated value by 5%, the
over-voltage protection OVP is active as shown in
Figure 7. This is implemented by sensing the voltage at
pin VSENSE with respect to a reference voltage of
5.25V. A VSENSE voltage higher than 5.25V will
immediately reduce the output duty cycle, bypassing
the normal voltage loop control. This results in a lower
input power to reduce the output voltage VOUT.
3.5Frequency Setting
The switching frequency of the PFC converter can be
set with an external resistor R5 at FREQ pin. The pin
voltage VFREQ is typically 2.5V. The corresponding
capacitor for the oscillator is integrated in the device
“Electrical Characteristic” section. The
recommended operating frequency range is from
50kHz to 250kHz. As an example, a R5 of 33kΩ at pin
FREQ will set a switching frequency FSW of 133kHz
typically.
3.6Average Current Control
3.6.1Complete Current Loop
The complete system current loop is shown in Figure
Figure 10Complete System Current Loop
It consists of the current loop block which averages the
voltage at pin ISENSE, resulted from the inductor
current flowing across R1. The averaged waveform is
compared with an internal ramp in the ramp generator
and PWM block. Once the ramp crosses the average
waveform, the comparator C1 turns on the driver stage
through the PWM logic block. The Nonlinear Gain block
defines the amplitude of the inductor current. The
following sections describe the functionality of each
individual blocks.
3.6.2Current Loop Compensation
The compensation of the current loop is done at the
ICOMP pin. This is the OTA2 output and a capacitor C3
has to be installed at this node to ground (see Figure
10). Under normal mode of operation, this pin gives a
voltage which is proportional to the averaged inductor
current. This pin is internally shorted to 5V in the event
of IC shuts down when OLP and UVLO occur.
3.6.3Pulse Width Modulation (PWM)
The IC employs an average current control scheme in
continuous conduction mode (CCM) to achieve the
