N74F74D ,Dual D-type flip-flopPIN CONFIGURATION• Industrial temperature range available (–40°C to +85°C)RD0 1 14VCCDESCRIPTIOND0 ..
N74F74N ,Dual D-type flip-flopPIN CONFIGURATION• Industrial temperature range available (–40°C to +85°C)RD0 1 14VCCDESCRIPTIOND0 ..
N74F74N ,Dual D-type flip-flop
N74F757D ,74F756; 74F757; 74F760; Octal inverter buffer (open-collector); Octal buffer (open-collector); Octal buffer (open-collector)
N74F786D ,4-bit asynchronous bus arbiter
N74F786D ,4-bit asynchronous bus arbiter
NFM21CC102R1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
NFM21CC102R1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
NFM21CC221R1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
NFM21CC221R1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
NFM21CC470U1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
NFM21CC470U1H3D , EMIFIL (Capacitor type) Single Circuit Type for Signal Lines NFM21C Series (0805 Size)
I74F74D-N74F74D-N74F74N
Dual D-type flip-flop
Product specification
Supercedes data of 1990 Oct 23
IC15 Data Handbook
1996 Mar 12
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
FEATURE Industrial temperature range available (–40°C to +85°C)
DESCRIPTIONThe 74F74 is a dual positive edge-triggered D-type flip-flop featuring
individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input. When
set and reset are inactive (high), data at the D input is transferred to
the Q and Q outputs on the low-to-high transition of the clock. Data
must be stable just one setup time prior to the low-to-high transition of
the clock for predictable operation. Clock triggering occurs at a
voltage level and is not directly related to the transition time of the
positive-going pulse. Following the hold time interval, data at the D
input may be changed without affecting the levels of the output.
PIN CONFIGURATION
ORDERING INFORMATION
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
NOTE: One (1.0) FAST unit load is defined as: 20μA in the high state and 0.6mA in the low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
LOGIC DIAGRAM
FUNCTION TABLE
NOTES:= High voltage level= High voltage level one setup time prior to low-to-high clock
transition= Low voltage level = Low voltage level one setup time prior to low-to-high clock
transition
NC= No change from the previous setup= Don’t care= Low-to-high clock transition= Not low-to-high clock transition= This setup is unstable and will change when either set or reset
return to the high level.
ABSOLUTE MAXIMUM RATINGS(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
DC ELECTRICAL CHARACTERISTICS(Over recommended operating free-air temperature range unless otherwise noted.)
NOTES: For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. All typical values are at VCC = 5V, Tamb = 25°C. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last. Measure ICC with the clock input grounded and all outputs open, then with Q and Q outputs high in turn.
AC ELECTRICAL CHARACTERISTICS
AC SETUP REQUIREMENTS
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
AC WAVEFORMSFor all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
Waveform 1. Propagation delay for data to output, data setup
time and hold times, and clock width, and maximum clock
frequency
Waveform 2. Propagation delay for set and reset to output,
set and reset pulse width
Waveform 3. Recovery time for set or reset to clock
TEST CIRCUIT AND WAVEFORMS
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
