HEF4070BT ,Quad 2-input EXCLUSIVE-OR gatePin configuration6.2 Pin description Table 2. Pin descriptionSymbol Pin Description1A, 2A, 3A, 4A 1 ..
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HEF4070BT
Quad 2-input EXCLUSIVE-OR gate
1. General descriptionThe HEF4070B is a quad 2-input EXCLUSIVE-OR gate. The outputs are fully buffered for
the highest noise immunity and pattern insensitivity to output impedance.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits Fully static operation5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85C Complies with JEDEC standard JESD 13-B
3. Applications Logical comparators Parity checkers and generators
4. Ordering information
HEF4070B
Quad 2-input EXCLUSIVE-OR gate
Rev. 4 — 27 March 2014 Product data sheet
Table 1. Ordering information
NXP Semiconductors HEF4070B
Quad 2-input EXCLUSIVE-OR gate
5. Functional diagram
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2. Pin description
NXP Semiconductors HEF4070B
Quad 2-input EXCLUSIVE-OR gate
7. Functional description[1] H = HIGH voltage level; L = LOW voltage level
8. Limiting values[1] For DIP14 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K.
[2] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 3. Functional table[1]
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS=0 V (ground).
Table 5. Recommended operating conditions
NXP Semiconductors HEF4070B
Quad 2-input EXCLUSIVE-OR gate
10. Static characteristicsTable 6. Static characteristicsVSS = 0 V; VI =VSS or VDD; unless otherwise specified
NXP Semiconductors HEF4070B
Quad 2-input EXCLUSIVE-OR gate
11. Dynamic characteristics[1] The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
[2] tt is the same as tTHL and tTLH.
12. Waveforms
Table 7. Dynamic characteristicsTamb = 25 C; waveforms see Figure 4; test circuit see Figure 5; unless otherwise specified.[1]
Table 8. Dynamic power dissipationVSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
NXP Semiconductors HEF4070B
Quad 2-input EXCLUSIVE-OR gate
Table 9. Measurement points
Table 10. Test data