HCPL-0601R2 ,8-Pin SOIC High SpeedAPPLICATIONS V• Ground loop elimination N/C 1 8CC0.019 (0.48)• LSTTL to TTL, LSTTL or 5-volt CMOS 0 ..
HCPL-0601R2V ,8-Pin SOIC High Speed HIGH SPEED-10 MBit/sLOGIC GATE OPTOCOUPLERSHCPL-0600 HCPL-0601DESCRIPTIONThe HCP ..
HCPL0601V ,8-Pin SOIC High SpeedAPPLICATIONS V• Ground loop elimination N/C 1 8CC0.019 (0.48)• LSTTL to TTL, LSTTL or 5-volt CMOS 0 ..
HCPL-0601V ,8-Pin SOIC High Speed HIGH SPEED-10 MBit/sLOGIC GATE OPTOCOUPLERSHCPL-0600 HCPL-0601DESCRIPTIONThe HCP ..
HCPL060L ,HCPL-060L · 3.3V Digital Optocoupler FamilyAgilent HCPL-260L/ 060L/263L/063LHigh Speed LVTTL Compatible3.3 Volt OptocouplersData Sheet
HCPL-060L ,HCPL-060L · 3.3V Digital Optocoupler FamilyFeatures• Low power consumption• 15 kV/µ s minimum Common ModeRejection (CMR) at V = 50 VCM• High s ..
HD68A40P , PTM(Programmble Timer Module)
HD68HC000-10 , MPU(MICRO PROCESSING UNIT)
HD68HC000-8 , MPU(MICRO PROCESSING UNIT)
HD68HC000P-12 , MPU(MICRO PROCESSING UNIT)
HD7400 , TTL HD74/HD74S Series
HD7400 , TTL HD74/HD74S Series
HCPL0600-HCPL0600R1-HCPL-0600R1-HCPL-0600R1V-HCPL0600R2-HCPL-0600R2-HCPL-0600R2V-HCPL0601-HCPL-0601R1-HCPL-0601R2-HCPL-0601R2V-HCPL0601V-HCPL-0601V
8-Pin SOIC High Speed
HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
HCPL-0600 HCPL-0601
DESCRIPTIONThe HCPL-0600/0601 optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector
logic gate with a strobable output. The devices are housed in a compact small-outline package. This output features an open
collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40°C to
+85°C. A maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out of 8). An internal noise
shield provides superior common mode rejection of typically 10 kV/µs.
FEATURES Compact SO8 package Very high speed-10 MBit/s Superior CMR-10 kV/µs Fan-out of 8 over -40°C to +85°C Logic gate output Strobable output Wired OR-open collector U.L. recognized (File # E90700)
APPLICATIONS Ground loop elimination LSTTL to TTL, LSTTL or
5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface
TRUTH TABLE
(Positive Logic)A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
Single-channel
circuit drawing
