HCPL-2601 ,HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERSHIGH SPEED-10 MBit/sLOGIC GATE OPTOCOUPLERSSINGLE-CHANNEL DUAL-CHANNEL6N137 HCPL-2630HCPL-2601 HCPL ..
HCPL-2601-020E , High CMR, High Speed TTL Compatible Optocouplers
HCPL-2601-300E , High CMR, High Speed TTL Compatible Optocouplers
HCPL-2601-500E , High CMR, High Speed TTL Compatible Optocouplers
HCPL-2601S ,8-Pin DIP 10 Mbit/s Single-Channel High Speed Logic Gate Output OptocouplerAPPLICATIONS Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS6N137 HCPL-2630 Line re ..
HCPL-2601SD ,8-Pin DIP 10 Mbit/s Single-Channel High Speed Logic Gate Output OptocouplerAPPLICATIONS Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS6N137 HCPL-2630 Line re ..
HD74ALVC162334 , 16-bit Universal Bus Driver with 3-state Outputs
HD74ALVC165245ATEL , 16-Bit Dual-supply Bus Transceiver with 3-state Outputs
HD74ALVC16835TEL , 18-bit Universal Bus Driver with 3-state Outputs
HD74ALVC16835TEL , 18-bit Universal Bus Driver with 3-state Outputs
HD74ALVC1G00VSE , 2-input NAND Gate
HD74ALVC1G00VSE , 2-input NAND Gate
HCPL-2601
HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS
HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS SINGLE-CHANNEL DUAL-CHANNEL 6N137 HCPL-2630 HCPL-2601 HCPL-2631 HCPL-2611 DESCRIPTION The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output 8 features an open collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40°C to +85°C. A 1 maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 10 kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs. The HCPL-2611 has a minimum CMR of 10 kV/µs. 8 8 1 FEATURES 1 • Very high speed-10 MBit/s Superior CMR-10 kV/µs Double working voltage-480V V N/C 1 8 V Fan-out of 8 over -40°C to +85°C CC + 1 8 CC Logic gate output V F1 Strobable output V _ + 2 7 V E 2 7 01 Wired OR-open collector V F U.L. recognized (File # E90700) _ V _ 3 6 V O 3 6 02 V F2 GND N/C 4 5 GND + 4 5 APPLICATIONS Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS 6N137 HCPL-2630 Line receiver, data transmission HCPL-2601 HCPL-2631 Data multiplexing Switching power supplies HCPL-2611 Pulse transformer replacement Computer-peripheral interface TRUTH TABLE (Positive Logic) Input Enable Output HH L LH H HL H LL H HNC L LNC H µF bypass capacitor must be connected between pins 8 and 5. A 0.1 (See note 1) 2001 DS300202 7/9/01 1 OF 11
