HCF4516 ,PRESETTABLE UP/DOWN COUNTERSHCF4516BPRESETTABLE BINARY UP/DOWN COUNTER ■ MEDIUM SPEED OPERATION :8 MHz (Typ.) at 10V■ SYNCHR ..
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HD64F3334YF16 , Old Company Name in Catalogs and Other Documents
HD64F3334YF16 , Old Company Name in Catalogs and Other Documents
HD64F3334YFLH16 , Hitachi Single Chip Microcomputer
HD64F3334YFLH16 , Hitachi Single Chip Microcomputer
HD64F3334YTF16 , Old Company Name in Catalogs and Other Documents
HD64F3337YFLH16 , Hitachi Single Chip Microcomputer
HCF4516
PRESETTABLE UP/DOWN COUNTERS
1/11September 2002 MEDIUM SPEED OPERATION :
8 MHz (Typ.) at 10V SYNCHRONOUS INTERNAL CARRY
PROPAGATION RESET AND PRESET CAPABILITY STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTIONHCF4516B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP package.
It is a PRESETTABLE BINARY UP/DOWN
COUNTER, consists of four synchronously
clocked D-type flip-flops (with a gating structure to
provide T-type flip-flop capability) connected as a
counter. This counter can be cleared by a high
level on the RESET line, and can be preset to any
binary number present on the jam inputs by a high
level on the PRESET ENABLE line. Synchronous
cascading is accomplished by connecting all clock
inputs in parallel and connecting the CARRY OUT
of a less significant stage to the CARRY IN of a
more significant stage. HCF4516B can be
cascaded in the ripple mode by connecting all
clock inputs in parallel and connecting the CARRY
OUT to the clock of the next stage. If the UP/
DOWN input changes during a terminal count, the
CARRY OUT must be gated with the clock, and
the UP/DOWN input must change while the clock
is high. This method provides a clean clock signal
to the subsequent counting stage.
HCF4516BPRESETTABLE BINARY UP/DOWN COUNTER
PIN CONNECTION
ORDER CODES
HCF4516B2/11
IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
FUNCTIONAL DIAGRAM
TRUTH TABLE X : Don’t Care
HCF4516B3/11
LOGIC DIAGRAM
TIMING CHART
HCF4516B4/11
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
HCF4516B5/11
DC SPECIFICATIONS The Noise Margin for both "1" and "0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
HCF4516B6/11
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
(1) Time required after the falling edge of the reset or preset enable inputs before the rising edge of the clock will trigger the counter (similar
to setup time)
(2) If more than unit is cascaded in the parallel clocked application, trCL should be made less than or equal to the sum of the fixed propagation
delay at 15pF and the transition time of the carry output driving stage for the estimated capacitive load.
