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HCF4053BEY-HCF4053BM1-HCF4053M013TR
TRIPLE 2 CHANNLE ANALOG MULTIPLEXERS DEMULTIPLEXERS
1/10October 2002 LOW "ON" RESISTANCE: 125Ω (Typ.)
OVER 15V p.p SIGNAL-INPUT RANGE FOR
VDD -VEE= 15V HIGH "OFF" RESISTANCE: CHANNEL
LEAKAGE± 100pA (Typ.)at VDD -VEE =18V BINARY ADDRESS DECODING ON CHIP HIGH DEGREE OF LINEARITY:< 0.5%
DISTORTION TYP.at fIS =1KHz, VIS =5 Vpp,DD -VSS> 10V, RL= 10KΩ VERY LOW QUIESCENT POWER
DISSIPATION UNDER ALL DIGITAL
CONTROL INPUT AND SUPPLY
CONDITIONS: 0.2 μW(Typ.) VDD -VSS =VDD -VEE =10V MATCHED SWITCH CHARACTERISTICS:ON =5Ω (Typ.) FORVDD -VEE= 15V WIDE RANGE OF DIGITAL AND ANALOG
SIGNAL LEVELS: DIGITAL3to 20,
ANALOG TO 20V p.p. QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT= 100nA (MAX)AT VDD =18VTA= 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC
JESD13B" STANDARD SPECIFICATIONS
FOR DESCRIPTION OFB SERIES CMOS
DEVICES"
DESCRIPTIONThe HCF4053Bisa monolithic integrated circuit
fabricatedin Metal Oxide Semiconductor
technology availablein DIP and SOP packages.
The HCF4053B analog multiplexer/demultiplexera digitally controlled analog switch having low impedance and very low OFF leakage current.
This multiplexer circuit dissipate extremely low
quiescent power over the full VDD -VSS and VDD-EE supply voltage range, independentof the
logic stateof the control signals.
Whena logic "1"is present at the inhibit input
terminalall channel are off. This deviceisa triple
2-channel multiplexer having three separate
digital control inputs,A,B, andC, and an inhibit
input. Each control input selects oneofa pairof
channels which are connectedina single pole
double-throw configuration.
HCF4053BTRIPLE 2-CHANNEL
ANALOG MULTIPLEXER/DEMULTIPLEXER
PIN CONNECTION
ORDER CODES
HCF4053B2/10
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE: Don’t Care
FUNCTIONAL DIAGRAM
HCF4053B3/10
ABSOLUTE MAXIMUM RATINGSAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied.
All voltage valuesare referredto VSSpin voltage.
(*) 500mWat65°C; derateto 300mWby 10mW/°Cfrom 65°Cto85°C
RECOMMENDED OPERATING CONDITIONS
HCF4053B4/10
SPECIFICATIONS Determinedby minimum feasible leakage measurementfor automating testing.
HCF4053B5/10
DYNAMIC ELECTRICAL CHARACTERISTICS(T amb= 25°C,CL= 50pF,all input square wave rise and
fall time=20ns)
(1) Both endsof channel. Peakto Peak voltage symmetrical about (VDD -VEE)/2
HCF4053B6/10
TYPICAL BIAS VOLTAGESThe ADDRESS (digital-control inputs) and INHIBIT logic levelsare: "0"=VSS and "1"=VDD. The analog signal (throughthe TG) may swing
from VEEto VDD
SPECIAL CONSIDERATIONSControlof analog signalsupto 20V peakto peak
canbe achievedby digital signal amplitudesof 4.5 20V(if VDD -VSS =3V, aVDD -VEEofupto 13V
can be controlled; for VDD -VEE level differences
above 13V,aVDD -VSS ofat least 4.5Vis
required. For example,ifVDD =+5,VSS =0, and
VEE= -13.5, analog signals from -13.5Vto 4.5V
can be controlledby digital inputsof0to 4.5V.In
certain applications, the external load resistor
current may include bothVDD and signal-line
components. To avoid drawingVDD current when
switch current flows into the transmission gate
inputs, the voltage drop across the bidirectional
switch must not exceed 0,8V (calculated fromRONvalues shownin DC SPECIFICATIONS). NoVDDcurrent will flow through RLif the switch current
flows into leads4,14 and 15.
TEST CIRCUIT= 50pFor equivalent (includesjig and probe capacitance) =200KΩ =ZOUTof pulse generator (typically 50Ω)
