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HCF4052
DIFFERENTIAL 4 CHANNLE ANALOG MULTIPLEXER DEMULTIPLEXER
1/11October 2002 LOW "ON" RESISTANCE: 125Ω (Typ.)
OVER 15V p.p SIGNAL-INPUT RANGE FOR
VDD -VEE= 15V HIGH "OFF" RESISTANCE: CHANNEL
LEAKAGE± 100pA (Typ.)at VDD -VEE =18V BINARY ADDRESS DECODING ON CHIP HIGH DEGREE OF LINEARITY:< 0.5%
DISTORTION TYP.at fIS =1KHz, VIS =5 Vpp,DD -VSS> 10V, RL= 10KΩ VERY LOW QUIESCENT POWER
DISSIPATION UNDER ALL DIGITAL
CONTROL INPUT AND SUPPLY
CONDITIONS: 0.2 μW(Typ.) VDD -VSS =VDD -VEE =10V MATCHED SWITCH CHARACTERISTICS:ON =5Ω (Typ.) FORVDD -VEE= 15V WIDE RANGE OF DIGITAL AND ANALOG
SIGNAL LEVELS: DIGITAL3to 20,
ANALOG TO 20V p.p. QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT= 100nA (MAX)AT VDD =18VTA= 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC
JESD13B" STANDARD SPECIFICATIONS
FOR DESCRIPTION OFB SERIES CMOS
DEVICES"
DESCRIPTIONThe HCF4052Bisa monolithic integrated circuit
fabricatedin Metal Oxide Semiconductor
technology availablein DIP and SOP packages.
The HCF4052B analog multiplexer/demultiplexera digitally controlled analog switch having low impedance and very low OFF leakage current.
This multiplexer circuit dissipate extremely low
quiescent power over the full VDD -VSS and VDD-EE supply voltage range, independentof the
logic stateof the control signals.
Whena logic "1"is present at the inhibit input
terminal all channel are off. This deviceisa
differential 4-channel multiplexer having two
binary control inputs,A andB andan inhibit input.
The two binary input signals selects1of4 pairsof
channelstobe turned on and connect the analog
inputsto the outputs.
HCF4052BDIFFERENT 4-CHANNEL
ANALOG MULTIPLEXER/DEMULTIPLEXER
PIN CONNECTION
ORDER CODES
HCF4052B2/11
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE: Don’t Care
FUNCTIONAL DIAGRAM
HCF4052B3/11
ABSOLUTE MAXIMUM RATINGSAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied.
All voltage valuesare referredto VSSpin voltage.
(*) 500mWat65°C; derateto 300mWby 10mW/°Cfrom 65°Cto85°C
RECOMMENDED OPERATING CONDITIONS
HCF4052B4/11
SPECIFICATIONS Determinedby minimum feasible leakage measurementfor automating testing.
HCF4052B5/11
DYNAMIC ELECTRICAL CHARACTERISTICS(T amb= 25°C,CL= 50pF,all input square wave rise and
fall time=20ns)
(1) Both endsof channel. Peakto Peak voltage symmetrical about (VDD -VEE)/2
HCF4052B6/11
TYPICAL BIAS VOLTAGESThe ADDRESS (digtal-control inputs)and INHIBIT logic levelsare: "0"=VSS and "1"=VDD. The analog signal (throughthe TG) may swing
from VEEto VDD
TYPICAL APPLICATIONS (TYPICAL TIME-DIVISION APPLICATION)
SPECIAL CONSIDERATIONSControlof analog signalsupto 20V peakto peak
canbe achievedby digital signal amplitudesof 4.5 20V(if VDD -VSS =3V, aVDD -VEEofupto 13V
can be controlled; forVDD -VEE level differences
above 13V,aVDD -VSS ofat least 4.5Vis
required. For example,if VDD =+5, VSS =0, and
VEE= -13.5, analog signals from -13.5Vto 4.5V
can be controlledby digital inputsof0to 4.5V.In
certain applications, the external load resistor
current may include both VDD and signal-line
components. To avoid drawing VDD current when
switch current flows into the transmission gate
inputs, the voltage drop across the bidirectional
switch must not exceed 0,8V (calculated from RON
values shownin DC SPECIFICATIONS). No VDD
current will flow throughRLif the switch current
flows into leads3 and 13.