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MC74HC126A ,Quad 3-State Non-Inverting BufferELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)L r fGuaranteed LimitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC126ADR2 ,Quad 3-State Non-Inverting BufferMAXIMUM RATINGS*Symbol Parameter Value UnitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎThis de ..
MC74HC126ADT ,Quad With 3-State Outputs NonInverting Buffer3MC74HC125A, MC74HC126ASWITCHING WAVEFORMSVCCOE (HC125A)50%t tr fGNDVCC90%VCCINPUT A 50%OE (HC126A) ..
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MC74HC126AFEL ,Quad 3-State Non-Inverting Bufferhttp://onsemi.comThe MC74HC125A and MC74HC126A are identical in pinout tothe LS125 and LS126. The d ..
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MCR265-10 ,Thyristors**Order this documentSEMICONDUCTOR TECHNICAL DATA by MCR265-2/D*Silicon Controlled Rectifiers. . . ..
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HC125-MC74HC125AD-MC74HC125AN
Quad Buffer with 3-STATE Outputs
SEMICONDUCTOR TECHNICAL DATA " !
High–Performance Silicon–Gate CMOSThe MC74HC125A and MC74HC126A are identical in pinout to the LS125
and LS126. The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LSTTL outputs.
The HC125A and HC126A noninverting buffers are designed to be used
with 3–state memory address drivers, clock drivers, and other bus–oriented
systems. The devices have four separate output enables that are active–low
(HC125A) or active–high (HC126A). Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
HC125A
Active–Low Output Enables
HC126A
Active–High Output EnablesA1
OE1
OE2
OE3
OE4
PIN 14 = VCC
PIN 7 = GND
OE1
OE2
OE3
OE4
FUNCTION TABLE
