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FQD2P25
250V P-Channel MOSFET
April 2000 TM QFET QFET QFET QFET FQD2P25 / FQU2P25 250V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect -2.0A, -250V, R = 4.0Ω @V = -10 V DS(on) GS transistors are produced using Fairchild’s proprietary, Low gate charge ( typical 6.5 nC) planar stripe, DMOS technology. Low Crss ( typical 6.5 pF) This advanced technology has been especially tailored to Fast switching minimize on-state resistance, provide superior switching 100% avalanche tested performance, and withstand high energy pulse in the Improved dv/dt capability avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters. D S !!!!!!!! ���� ���� G!!!!!!!! �������� ���� ���� �������� I-PAK D-PAK ���� ���� G S G FQD Series D FQU Series S !!!!!!!! D Absolute Maximum Ratings �� T = 25°C unless otherwise noted C Symbol Parameter FQD2P25 / FQU2P25 Units V Drain-Source Voltage -250 V DSS I - Continuous (T = 25°C) Drain Current -2.0 A D C - Continuous (T = 100°C) -1.27 A C I (Note 1) Drain Current - Pulsed -8.0 A DM V Gate-Source Voltage ±�30 V GSS E (Note 2) Single Pulsed Avalanche Energy 120 mJ AS I Avalanche Current (Note 1) -2.0 A AR E (Note 1) Repetitive Avalanche Energy 3.7 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) -5.5 V/ns Power Dissipation (T = 25°C) * 2.5 W P A D Power Dissipation (T = 25°C) 37 W C - Derate above 25°C 0.29 W/°C T , T Operating and Storage Temperature Range -55 to +150 °C J STG Maximum lead temperature for soldering purposes, T 300 °C L 1/8��from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units R Thermal Resistance, Junction-to-Case -- 3.4 °C�W θJC R Thermal Resistance, Junction-to-Ambient * -- 50 °C�W θJA R � Thermal Resistance, Junction-to-Ambient -- 110 °C W θJA * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor International Rev. A, April 2000 FQD2P25 / FQU2P25
