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FPD87346BXAVS-FPD87346VS
Low EMI, Low Dynamic Power (SVGA) XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling (RSDS™) Outputs
FPD87346
Low EMI, Low Dynamic Power (SVGA) XGA/WXGA
TFT-LCD Timing Controller with Reduced Swing
Differential Signaling (RSDS™) Outputs
General DescriptionThe FPD87346isa timing controller that combinesan LVDS
single pixel input interface with National’s Reduced Swing
Differential Signaling (RSDS™) output driver interfacefor
(SVGA) XGA and Wide XGA resolutions.It resideson the
TFT-LCD panel and providesthe data buffering and control
signal generationfor (SVGA) XGA, and Wide XGA graphic
modes. The RSDS™ pathto the column driver contributes
toward lowering radiated EMI and reducing system dynamic
power consumption.
This single RSDS™ bus conveys the 8-bit color datafor
(SVGA) XGA, and Wide XGA panelsat 170 Mb/s when using
VESA60Hz standard timing.
Features Reduced Swing Differential Signalling (RSDS™) digital
bus reduces dynamic power, EMI and bus width from
the timing controller LVDS single pixel input interface system Input clock range from40 MHzto85 MHz Drives RSDS™ Column Driversat 170 Mb/s withan MHz clock (Max.) Virtual8bit color depthin FRC/Dithering mode Single narrow 9-bit differential Source Driver bus
minimizes widthof Source PCB Abilityto drive (SVGA) XGA and Wide XGA TFT-LCD
Systems Failure detect functioninDE mode CMOS circuitry operates froma 3.0V–3.6V supply
System DiagramFIGURE1. Block Diagramof the LCD Module
PRELIMINARY
October 2003
FPD87346
PRS
Low
EMI,
Low
Dynamic
Power
(SVGA)
XGA/WXGA
TFT
-LCD
iming
Controller
with
Reduced
Swing
Differential
Signaling
(RSDS
Outputs
