FM27C512V45L , 512K-Bit (64K x 8) High Performance CMOS EPROMBlock DiagramData Outputs O - O0 7VCCGNDVPPOEOutput Enable and Chip Enable LogicCE/PGM OutputBuffe ..
FM28V020-SG ,256-Kbit (32 K ?8) F-RAM MemoryCharacteristics ..... 9Pin Definitions ... 4 SRAM Read Cycle 9Device Operation ........ 5 SRAM Wri ..
FM28V020-SGTR ,256-Kbit (32 K ?8) F-RAM MemoryFeatures❐ 28-pin small outline integrated circuit (SOIC) package256-Kbit ferroelectric random acces ..
FM28V100-TG ,1-Mbit (128 K ?8) F-RAM MemoryFeatures 32-pin thin small outline package (TSOP) Type I 1-Mbit ferroelectric random access memory ..
FM28V100-TG ,1-Mbit (128 K ?8) F-RAM MemoryBlock DiagramA16-3A16-0128 K x 8F-RAM ArrayA2-0. . .CE , CE1 2Column DecoderWEControl DQ7-0LogicOE ..
FM28V100-TG ,1-Mbit (128 K ?8) F-RAM MemoryCharacteristics ..... 8Pin Definitions ... 3 SRAM Read Cycle 8Device Operation ........ 4 SRAM Wri ..
FW82546GB , 82546GB Dual Port Gigabit Ethernet Controller
FW82546GB , 82546GB Dual Port Gigabit Ethernet Controller
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FW82801BA.SL5PN , Intel® 82801EB I/O Controller Hub 5 (ICH5) / Intel® 82801ER I/O Controller Hub 5 R (ICH5R)
FW82801BASL5PN , Intel® 82801EB I/O Controller Hub 5 (ICH5) / Intel® 82801ER I/O Controller Hub 5 R (ICH5R)
FM27C512V45L
512K-Bit (64K x 8) High Performance CMOS EPROM
FM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM . . . . . . . . . January 2000 FM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM The FM27C512 is one member of a high density EPROM Family General Description which range in densities up to 4 Megabit. The FM27C512 is a high performance 512K UV Erasable Electri- cally Programmable Read Only Memory (EPROM). It is manufac- Features tured using Fairchild’s proprietary CMOS AMG™ EPROM tech- � High performance CMOS nology for an excellent combination of speed and economy while — 90 ns access time providing excellent reliability. � Fast turn-off for microprocessor compatibility The FM27C512 provides microprocessor-based systems storage � Manufacturers identification code capacity for portions of operating system and application soft- ware. Its 90 ns access time provides no wait-state operation with � JEDEC standard pin configuration high-performance CPUs. The FM27C512 offers a single chip — 28-pin PDIP package solution for the code storage requirements of 100% firmware- — 32-pin chip carrier based equipment. Frequently-used software routines are quickly — 28-pin CERDIP package executed from EPROM storage, greatly enhancing system utility. The FM27C512 is configured in the standard JEDEC EPROM pinout which provides an easy upgrade path for systems which are currently using standard EPROMs. Block Diagram Data Outputs O - O 0 7 V CC GND V PP OE Output Enable and Chip Enable Logic CE/PGM Output Buffers Y Decoder 524,288-Bit Cell Matrix A - A 0 15 Address Inputs X Decoder DS800035-1 AMG is a trademark of WSI, Inc. 1 © 1998 FM27C512