FIN1531 ,5V LVDS 4-Bit High Speed Differential DriverFeaturesutilizing Low Voltage Differential Signaling (LVDS) technol-
FIN1531
5V LVDS 4-Bit High Speed Differential Driver
FIN1531 5V LVDS 4-Bit High Speed Differential Driver August 2001 Revised August 2001 FIN1531 5V LVDS 4-Bit High Speed Differential Driver General Description This quad driver is designed for high speed interconnects Features utilizing Low Voltage Differential Signaling (LVDS) technol- Greater than 400Mbs data rate ogy. The driver translates 5V TTL/CMOS signal levels to LVDS levels with a typical differential output swing of 3505V power supply operation mV which provides low EMI at ultra low power dissipation 400ps max differential pulse skew even at high frequencies. This device is ideal for high 2.0ns maximum propagation delay speed transfer of clock and data. Low power dissipation The FIN1531 can be paired with its companion receiver, Power-Off protection the FIN1532, or with any other Fairchild LVDS receiver. Meets or exceeds the TIA/EIA-644 LVDS standard Pin compatible with equivalent RS-422 and PECL devices 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number Package Description FIN1531M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1531MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Function Table Connection Diagram Input Outputs D D D EN EN IN OUT+ OUT− HX H H L HX L L H HX OPEN L H XL H H L XL L L H XL OPEN L H LH X Z Z H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance Pin Descriptions Pin Name Description D , D , D , D 5V TTL/CMOS Data Input IN1 IN2 IN3 IN4 D , D +, D , D Non-inverting LVDS Output OUT1+ OUT2 OUT3+ OUT4+ D , D , D , D Inverting LVDS Output OUT1− OUT2− OUT3− OUT4− EN Driver Enable Pin EN Inverting Driver Enable Pin V Power Supply CC GND Ground © 2001 DS500505
