FIN1101MX ,LVDS 1 Port High Speed RepeaterFeaturesThis single port repeater is designed for high speed inter-
FIN1101K8X-FIN1101MX
LVDS 1 Port High Speed Repeater
FIN1101 LVDS Single Port High Speed Repeater January 2002 Revised September 2002 FIN1101 LVDS Single Port High Speed Repeater General Description Features This single port repeater is designed for high speed inter-Up to 1.6 Gb/s full differential path connects utilizing Low Voltage Differential Signaling3.5 ps max random jitter and 135 ps max deterministic (LVDS) technology. It accepts and outputs LVDS levels jitter with a typical differential output swing of 330 mV which pro- 3.3V power supply operation vides low EMI at ultra low power dissipation even at high Wide rail-to-rail common mode range frequencies. It can directly accept multiple differential I/O Ultra low power consumption including: LVPECL, HSTL, and SSTL-2 for translating directly to LVDS.LVDS receiver inputs accept LVPECL, HSTL, and SSTL-2 directly Power off protection 7 kV HBM ESD protection (all pins) Meets or exceed the TA/EIA-644-A LVDS standard Packaged in 8-pin SOIC and US8 Open circuit fail safe protection Ordering Code: Order Number Package Number Package Description FIN1101M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TUBE] FIN1101MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TAPE and REEL] FIN1101K8X MAB08A 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide [TAPE and REEL] Connection Diagrams Pin Descriptions Pin Name Description SOIC Package R Non-Inverting LVDS Inputs IN+ R Inverting LVDS Inputs IN− D Non-Inverting Driver Outputs OUT+ D Inverting Driver Outputs OUT− EN Driver Enable Pin V Power Supply CC US8 Package GND Ground Function Table Inputs Outputs R R D D EN IN+ IN− OUT+ OUT− HH L H L HL H L H Functional Diagram H Fail Safe Case H L LX X Z Z H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance © 2002 DS500654
