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FIN1047MTC-FIN1047MTCX-FIN1047MX Fast Delivery,Good Price
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FIN1047MTCFAIN/a2093avai3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver
FIN1047MTCXFAIRCHIN/a105avai3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver
FIN1047MXFAIRCHILN/a98avai3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver
FIN1047MXFAIN/a3091avai3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver


FIN1047MX ,3.3V LVDS 4-Bit Flow-Through High Speed Differential DriverFeaturesThis quad driver is designed for high speed interconnects

FIN1047MTC-FIN1047MTCX-FIN1047MX
3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver
FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver June 2001 Revised August 2003 FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver General Description Features This quad driver is designed for high speed interconnectsGreater than 400Mbs data rate utilizing Low Voltage Differential Signaling (LVDS) technol-Flow-through pinout simplifies PCB layout ogy. The driver translates LVTTL signal levels to LVDS lev- 3.3V power supply operation els with a typical differential output swing of 350mV which 0.4 ns maximum differential pulse skew provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans-1.7 ns maximum propagation delay fer of clock and data.Low power dissipation The FIN1047 can be paired with its companion receiver,Power-Off protection the FIN1048, or any other LVDS receiver. Meets or exceeds the TIA/EIA-644 LVDS standard Pin compatible with equivalent RS-422 and LVPECL devices 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number Package Description FIN1047M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1047MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Name Description D , D , D , D LVTTL Data Inputs IN1 IN2 IN3 IN4 D , D , D , D Non-Inverting OUT1+ OUT2+ OUT3+ OUT4+ Driver Outputs D , D , D , D Inverting OUT1− OUT2− OUT3− OUT4− Driver Outputs EN Driver Enable Pin EN Inverting Driver Enable Pin V Power Supply CC GND Ground Truth Table Inputs Outputs D D D EN EN IN OUT+ OUT− H L or OPEN H H L H L or OPEN L L H H L or OPEN OPEN L H XHX Z Z L or OPEN X X Z Z H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance © 2003 DS500589
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