FIN1001M5X ,3.3V LVDS 1-Bit High Speed Differential DriverFeaturesThis single driver is designed for high speed interconnects
FIN1001M5-FIN1001M5X
3.3V LVDS 1-Bit High Speed Differential Driver
FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver December 2001 Revised August 2004 FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnectsGreater than 600Mbs data rate utilizing Low Voltage Differential Signaling (LVDS) technol-3.3V power supply operation ogy. The driver translates LVTTL signal levels to LVDS lev- 0.5ns maximum differential pulse skew els with a typical differential output swing of 350 mV which 1.5ns maximum propagation delay provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans-Low power dissipation fer of clock or data.Power-Off protection The FIN1001 can be paired with its companion receiver,Meets or exceeds the TIA/EIA-644 LVDS standard the FIN1002, or with any other LVDS receiver. Flow-through pinout simplifies PCB layout 5-Lead SOT23 package saves space Ordering Code: Order Number Package Number Package Description FIN1001M5 MA05B 5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel] FIN1001M5X MA05B 5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel] Pin Descriptions Connection Diagram Pin Name Description Pin Assignment for SOT23 D LVTTL Data Input IN D Non-inverting LVDS Driver Output OUT+ D Inverting LVDS Driver Output OUT− V Power Supply CC GND Ground NC No Connect Function Table Input Outputs D D D IN OUT+ OUT− LL H HH L (Top View) H = HIGH Logic Level L = LOW Logic Level © 2004 DS500721
