FDV303N_NL ,Digital FET, N-ChannelFeatures25 V, 0.68 A continuous, 2 A Peak.These N-Channel enhancement mode field effect transistors ..
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FDV303N_NL
Digital FET, N-Channel
August 1997 FDV303N Digital FET, N-Channel General Description Features 25 V, 0.68 A continuous, 2 A Peak. These N-Channel enhancement mode field effect transistors are R = 0.45 W @ V = 4.5 V produced using Fairchild's proprietary, high cell density, DMOS DS(ON) GS technology. This very high density process is tailored to minimize R = 0.6 W @ V = 2.7 V. DS(ON) GS on-state resistance at low gate drive conditions. This device is Very low level gate drive requirements allowing direct designed especially for application in battery circuits using either operation in 3V circuits. V < 1.5V. one lithium or three cadmium or NMH cells. It can be used as an GS(th) inverter or for high-efficiency miniature discrete DC/DC Gate-Source Zener for ESD ruggedness. conversion in compact portable electronic devices like cellular >6kV Human Body Model phones and pagers. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts. Compact industry standard SOT-23 surface mount package. Alternative to TN0200T and TN0201T. TM TM SuperSOT -8 SOIC-16 SOT-23 SuperSOT -6 SO-8 SOT-223 Mark:303 D G S o Absolute Maximum Ratings T = 25 C unless other wise noted A Symbol Parameter FDV303N Units V Drain-Source Voltage, Power Supply Voltage 25 V DSS V Gate-Source Voltage, V 8 V GSS IN Drain/Output Current - Continuous 0.68 A I D - Pulsed 2 P Maximum Power Dissipation 0.35 W D T ,T Operating and Storage Temperature Range -55 to 150 °C J STG ESD Electrostatic Discharge Rating MIL-STD-883D 6.0 kV Human Body Model (100pf / 1500 Ohm) THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Ambient 357 °C/W JA q © 1997 FDV303N Rev.D1