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FDS6892A_NLFAIRCHILN/a25000avaiDual N-Channel Logic Level PWM Optimized PowerTrench MOSFET

FDS6892A_NL ,Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFETapplications where low in-line powerloss and fast switching are required.• High power and current h ..
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FDS6892A_NL
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
FDS6892A October 2001 FDS6892A Ò Ò Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced · 7.5 A, 20 V. R = 18 m W @ V = 4.5 V DS(ON) GS using Fairchild Semiconductor’s advanced R = 24 m W @ V = 2.5 V DS(ON) GS PowerTrench process that has been especially tailored · Low gate charge (12 nC) to minimize the on-state resistance and yet maintain superior switching performance. · High performance trench technology for extremely These devices are well suited for low voltage and low R DS(ON) battery powered applications where low in-line power loss and fast switching are required. · High power and current handling capability D1 D 5 4 D1 D D2 D Q1 6 3 D2 D 7 2 G1 Q2 SO-8 G S1 8 1 S G2 S S2 SO-8 S Pin 1 o Absolute Maximum Ratings T =25 C unless otherwise noted A Symbol Parameter Ratings Units V Drain-Source Voltage 20 V DSS V GSS Gate-Source Voltage ± 12 V I Drain Current – Continuous (Note 1a) 7.5 A D – Pul sed 30 P W D Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 T , T Operating and Storage Junction Temperature Range –55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W qJA R Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W qJC Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6892A FDS6892A 13’’ 12mm 2500 units Ó2001 FDS6892A Rev C (W)

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