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FDP6035LNSN/a46avaiN-Channel Logic Level Enhancement Mode Field Effect Transistor


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FDP6035L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
April 1998 FDP6035L/FDB6035L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features 58 A, 30 V. R = 0.011 W @ V =10 V These N-Channel logic level enhancement mode power DS(ON) GS R = 0.019 W @ V =4.5 V. field effect transistors are produced using Fairchild's DS(ON) GS proprietary, high cell density, DMOS technology. This very Low gate charge (typical 34 nC). high density process is especially tailored to minimize on-state resistance. These devices are particularly suited Low Crss (typical 175 pF). for low voltage applications such as DC/DC converters and Fast switching speed. high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. ________________________________________________________________________________ D G S Absolute Maximum Ratings T = 25°C unless otherwise noted C Symbol Parameter FDP6035L FDB6035L Units V Drain-Source Voltage 30 V DSS V Gate-Source Voltage ±20 V GSS Drain Current - Continuous 58 A I D - Pulsed 175 P Maximum Power Dissipation @ T = 25°C 75 W D C Derate above 25°C 0.5 W/°C T ,T Operating and Storage Temperature Range -65 to 175 °C J STG THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Case 2 °C/W JC q R Thermal Resistance, Junction-to-Ambient 62.5 °C/W qJA © 1998 FDP6035L Rev.B
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