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ESDALC6V1W5
QUAD TRANSIL ARRAY FOR ESD PROTECTION
ESDALC6V1W5QUAD TRANSIL™ ARRAY
FOR ESD PROTECTION
Where transient overvoltage protectionin ESD
sensitive equipmentis required, suchas: Computers Printers Communication systems and cellular phones Video equipment Set top boxes
MAIN APPLICATIONSApplication Specific Discretes
A.S.D.
FUNCTIONAL DIAGRAM4 unidirectional TRANSIL™ functions. ESD Protection: IEC61000-4-2 level4 Breakdown voltage VBR= 6.1V min Low leakage current< 1μA@3 Volts Low capacitance device
FEATURESThe ESDALC6V1W5isa 4-bit wide monolithic
suppressor whichis designedto protect component
connectedto data and transmission lines against
ESD. clamps the voltage just above the logic level
supply for positive transients, andtoa diode drop
below groundfor negative transients.
DESCRIPTION High ESD protection level:upto25 kV. Capacitance: 12pF@ 0V Typ. High integration. Suitablefor high density boards.
BENEFITS IEC61000-4-2 level4:15 kV (air discharge)kV (contact discharge) MIL STD 883C-Method 3015-6: class3.
(human body model) 25kV (HBM)
COMPLIES WITHTHE FOLLOWINGSTANDARDS:
ESDALC6V1W5
ELECTRICAL CHARACTERISTICS (Tamb= 25°C)
ABSOLUTE MAXIMUM RATINGS (Tamb= 25°C)
Note1: Square pulse Ipp= 15A, tp=2.5μs.
Note2:Δ VBR=αT* (Tamb -25°C)* VBR (25°C)
ESDALC6V1W5
1.1 25 50 75 100 125 150 175
Ppp[Tj initial] / Ppp [Tj initial = 25°C]
Fig.1: Relative variationof peak pulse power
versus initial junction temperature.
100 10 100
Ppp(W)
Fig.2: Peak pulse power versus exponential pulse
duration.
23 45
C(pF)
Fig.3: Junction capacitance versus reverse voltage
applied (typical values).
100.0 1020 3040 5060
Ipp(A)
Fig.4: Clamping voltage versus peak pulse cur-
rent (maximum values, rectangular waveform).
100 50 75 100 125
IR [Tj] / IR [Tj=25°C]
Fig.5: Relative variationof leakage current versus
junction temperature (typical values).
Fig.6: Application example
ESDALC6V1W5With the focusof lowering the operation levels, the problemof malfunction causedby the environmentis
critical. Electrostatic discharge (ESD)isa major causeof failurein electronic systems.a transient voltage suppressor, ESDALC6V1W5isan ideal choicefor ESD protectionby suppressing
ESD events.Itis capableof clamping the incoming transienttoa low enough level such that any damageis
preventedon the device protectedby ESDALC6V1W5.
ESDALC6V1W5 servesasa parallel protection elements, connected between the signal line and ground. the transient rises above the operating voltageof the device, the ESDALC6V1W5 becomesa low
impedance path diverting the transient currentto ground.
The clamping voltageis givenby the following formula:
VCL =VBR+ Rd.IPP shownin figure A1, the ESD strikes are clampedby the transient voltage suppressor.
ESD protectionby ESDALC6V1W5
TECHNICAL INFORMATION
Fig. A1: ESD clamping behavior havea good approximationof the remaining voltagesat both Vi/o side, we provide the typical dynamical
resistance value Rd.By taking into account the following hypothesis:> Rd and Rload> Rd have:Vi o V R V d =+ ×
The resultsof the calculation done Vg= 8kV, Rg= 330Ω (IEC61000-4-2 standard), VBR= 6.1V (min) and= 1.1Ω (typ.) give:Vi o Volts/,= 328
This confirms the very low remaining voltage across the devicetobe protected.Itis also importantto note
thatin this approximation the parasitic inductance effect was not taken into account. This couldbea few
tenthsof volts duringa fewnsat the Vi/o side.
ESDALC6V1W5
Fig. A2: ESD test board
Fig. A3: ESD test configuration
The measurements done here after show very clearly (Fig. A4) the high efficiencyof the ESD protection:
the clamping voltage V(i/o) becomes very closeto +VBR (positive way, Fig. A4a) and -VBR (negative way,
Fig. A4b).
Fig. A4: Remaining voltage during ESD surge
ESDALC6V1W5
CROSSTALK BEHAVIOR
Fig. A5: Crosstalk phenomenon
The crosstalk phenomena are dueto the coupling between2 lines. Coupling factors( β12or β21) increase
when the gap across lines decreases, particularlyin silicon dice.In the example above, the expected
signalon load RL2is α2VG2,in fact the real voltageat this point has gotan extra value β21VG2. This partof
the VG1 signal represents the effectof the crosstalk phenomenonof the line1 on the line2. This
phenomenon hastobe taken into account when the drivers impose fast digital dataor high frequency
analog signals. The perturbed line willbe more affectedifit works with low voltage signalor high load
impedance (few kΩ)
Fig. A6: Analog crosstalk measurements
