ESDA6V1-4F1 ,QUAD TRANSIL ARRAY FOR ESD PROTECTIONFEATURESn 4 Unirectional transil functionsn Breakdown voltage: V = 6.1VminBRn Low leakage current < ..
ESDA6V1-4F1 ,QUAD TRANSIL ARRAY FOR ESD PROTECTIONAPPLICATIONS3 21Where transient overvoltage protection in ESDsensitive equipment is required, such ..
ESDA6V1-5M6 ,TRANSIL ARRAY FOR ESD PROTECTIONFeatures■ High ESD protection level■ High integration■ Suitable for high density boards■ 4 unidirec ..
ESDA6V1-5P6 ,TRANSIL ARRAY FOR ESD PROTECTIONFEATURESn 5 UNIDIRECTIONAL TRANSIL™ FUNCTIONS.n BREAKDOWN VOLTAGE V = 6.1V MINBRn LOW LEAKAGE CURRE ..
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ESDA6V1-4F1
QUAD TRANSIL ARRAY FOR ESD PROTECTION
ESDA6V1-4F1QUAD TRANSIL™ ARRAY
FOR ESD PROTECTION
The ESDA6V1-4F1isa 4-bit wide monolithic
suppressor designed to protect against ESD
components which are connectedto data and
transmission lines. clamps the voltage just above the logic level
supply for positive transients, and toa diode
forward voltage drop below ground for negative
transients.
DESCRIPTIONWhere transient overvoltage protectionin ESD
sensitive equipmentis required, suchas: Computers Printers Communication systems GSM handsets and accessories Other telephone sets Set top boxes
APPLICATIONS
FUNCTIONAL DIAGRAMA.S.D.™ >± 15kV ESD Protection High integration Suitablefor high density boards
BENEFITS IEC61000-4-2: Level4kV (air discharge)kV (contact discharge) MIL STD 883E-Method 3015-6: class3
(Human body model)
COMPLIES WITH THE FOLLOWING STAN-
DARDS: 4 Unirectional transil functions Breakdown voltage: VBR= 6.1Vmin Low leakage current<10 μA Very low PCB space consuming
FEATURES
ESD RESPONSE TO IEC61000-4-2
(air discharge 16kV, positive surge)
ESDA6V1-4F1
ABSOLUTE MAXIMUM RATINGS (Tamb= 25°C)
ELECTRICAL CHARACTERISTICS (Tamb= 25°C)
Note1: Square pulseIPP= 15A,tp= 2.5μs
Note2: ΔVBR= αT*(Tamb -25)*VBR(25°C)
ESDA6V1-4F1 25 50 75 100 125 150 1750.0
Ppp[Tj initial]/Ppp[Tj initial=25°C]
Fig.1: Peak power dissipation versus initial junc-
tion temperature 10 10010
Ppp(W)
Fig.2: Peak pulse power versus exponential pulse
duration(Tj initial= 25°C) 5 10 15 20 25 300.1
Ipp(A)
Fig.3: Clamping voltage versus peak pulse current
(Tj initial= 25°C). Rectangular waveformtP= 2.5μs.
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.075
C(pF)
Fig.4: Capacitance versus reverse applied voltage
(typical values). 50 75 100 125 1501.0
IR[Tj] / IR[Tj=25°C]
Fig.5: Relative variationof leakage current versus
junction temperature (typical values).
ESDA6V1-4F1 the valueof the dynamic resistance remains stable fora surge duration lower than 20μs, the 2.5μs
rectangular surgeis well adapted.In addition both rise and fall times are optimisedto avoid any parasitic
phenomenon during the measurementof Rd.
The ESDA6V1-4F1 has been designedto clamp fast spikes like ESD. Generally the PCB designers need calculate easily the clamping voltageVCL. Thisis why we give the dynamic resistancein additionto the
classical parameters.
The voltage across the protection cell canbe calculated with the following formula: RICL BR d PP=+ ⋅
WhereIPPis the peak current through the ESDA cell.
USE OF THE DYNAMIC RESISTANCE
CALCULATION OF THE CLAMPING VOLTAGEThe short durationof the ESD has ledusto prefera more adapted test wave,as below defined,to the
classical 8/20 μs and 10/1000μs surges
DYNAMIC RESISTANCE MEASUREMENTt
IPP
2.5 μs duration measurement waveWith the focusof lowering the operation levels, the problemof malfunction causedby the environmentis
critical. Electrostatic discharge (ESD)isa major causeof failurein electronic system.
Transient Voltage Suppressors are an ideal choice for ESD protection and have proven capablein
suppressing ESD events. They are capableof clamping the incoming transienttoa low enough level such
that damageto the protected semiconductoris prevented. Surface mount TVS arrays offer the best choice
for minimal lead inductance. They serveas parallel protection elements, connected between the signal line ground. As the transient rises above the operating voltageof the device, the TVS array becomesa low
impedance path diverting the transient currentto ground.
ESD PROTECTION WITH ESDA6V1-4F1
ESDA6V1-4F1The ESDA6V1-4F1 arrayis the ideal product for use as board level protectionof ESD sensitive
semiconductor components.
The Flip Chip package makes the ESDA6V1-4F1 device someof the smallest ESD protection devices
available.It also allows design flexibilityin the designof “crowded” boards where the space savingisata
premium. This enablesto shorten the routing and can contributeto improved ESD performance.
LAYOUT RECOMMENDATIONSCircuit board layoutisa critical design stepin the suppressionof ESD induced transients. The following
guidelines are recommended: The ESDA6V1-4F1 shouldbe placedas closeas possibleto the input terminalsor connectors. Minimise the path length between the ESD suppressor and the protected device Minimiseall conductive loops, including power and ground loops The ESD transient return pathto ground shouldbe keptas shortas possible. Use ground planes whenever possible.
ESDA6V1-4F1Information furnishedisbelieved tobeaccurateandreliable.However,STMicroelectronics assumesno responsibility forthe consequencesof
use ofsuch informationnorforany infringementofpatentsorotherrightsof third parties which mayresultfromits use.Nolicenseisgrantedby
implicationor otherwise underany patentor patent rightsof STMicroelectronics. Specifications mentionedinthis publicationare subjectto
changewithout notice. This publication supersedesand replaces allinformation previously supplied.
STMicroelectronics productsarenot authorizedforuseas criticalcomponentsinlife support devicesor systems without express writtenap-
provalof STMicroelectronics.
TheST logoisa registered trademarkof STMicroelectronics 2002 STMicroelectronics- Printedin Italy-All rights reserved.
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PACKAGE MECHANICAL DATAFlip Chip (all dimensionsin μm)
MARKINGDie size: (1570± 50)x (1070± 50)
Die height (including bumps): 650±40
Bump diameter: 315±50
Pitch: 500±50
MARKING
Note: For PCB design, assembly recommendations and packing information please referto Application
note AN1235. (“Flip-Chip: Package Description and recommendationsfor use”)
