ESDA6V1-4BC6 ,QUAD BIRIDECTIONAL TRANSIL SUPPRESSOR FOR ESD PROTECTIONFEATURESn 4 BIDIRECTIONAL TRANSIL FUNCTIONS2 5n ESD PROTECTION FOR DATA, SIGNAL ANDV BUSCCn STAND O ..
ESDA6V1-4F1 ,QUAD TRANSIL ARRAY FOR ESD PROTECTIONFEATURESn 4 Unirectional transil functionsn Breakdown voltage: V = 6.1VminBRn Low leakage current < ..
ESDA6V1-4F1 ,QUAD TRANSIL ARRAY FOR ESD PROTECTIONAPPLICATIONS3 21Where transient overvoltage protection in ESDsensitive equipment is required, such ..
ESDA6V1-5M6 ,TRANSIL ARRAY FOR ESD PROTECTIONFeatures■ High ESD protection level■ High integration■ Suitable for high density boards■ 4 unidirec ..
ESDA6V1-5P6 ,TRANSIL ARRAY FOR ESD PROTECTIONFEATURESn 5 UNIDIRECTIONAL TRANSIL™ FUNCTIONS.n BREAKDOWN VOLTAGE V = 6.1V MINBRn LOW LEAKAGE CURRE ..
ESDA6V1-5SC6 ,TRANSIL ARRAY FOR ESD PROTECTIONFEATURESI/O1 I/O5n 5 UNIDIRECTIONAL TRANSIL
ESDA6V1-4BC6
QUAD BIRIDECTIONAL TRANSIL SUPPRESSOR FOR ESD PROTECTION
ESDA6V1-4BC6QUAD BIDIRECTIONAL TRANSIL
SUPPRESSOR FOR ESD PROTECTION
The ESDA6V1-4BC6 is a monolithic array
designedto protectupto4 linesina bidirectional
way against ESD transients.
The deviceis ideal for situations where board
spaceisata premium.
DESCRIPTIONWhere transient overvoltage protectionin ESD
sensitive equipmentis required, suchas: COMPUTERS PRINTERS COMMUNICATION SYSTEMS VIDEO EQUIPMENT
This deviceis particularly adaptedto the protection symmetrical signals.
APPLICATIONS
FUNCTIONAL DIAGRAMSOT23-6L
Application Specific Discretes
A.S.D.™ High ESD protection level High integration Suitablefor high density boards
BENEFITS IEC61000-4-2:15kV (air discharge)kV (contact discharge) MIL STD 883E-Method 3015-7: class3
(human body model)
COMPLIES WITH THE FOLLOWING STANDARDS:4 BIDIRECTIONAL TRANSIL FUNCTIONS ESD PROTECTION FOR DATA, SIGNAL AND
VCC BUS STAND OFF VOLTAGE RANGE:5V LOW LEAKAGE CURRENT PEAK PULSE POWER (8/20μs); 80W CHANNEL SEPARATION: 80dB typ.@20KHz
FEATURES
ESDA6V1-4BC6With the focusof lowering the operation levels, the problemof malfunction causedby the environmentis
critical. Electrostatic discharge (ESD)isa major causeof failurein electronic system.
Transient Voltage Suppressors are an ideal choice for ESD protection and have proven capablein
suppressing ESD events. They are capableof clamping the incoming transienttoa low enough level such
that damageto the protected semiconductoris prevented.
Surface mount TVS arrays offer the best choice for minimal lead inductance.
They serveas parallel protection elements, connected between the signal lineto ground.As the transient
rises above the operating voltageof the device, the TVS array becomesa low impedance path diverting the
transient currentto ground.
ESD protectionby ESDA6V1-4BC6
Bidirectional protection for0V biased signals.The ESDA6V1-4BC6 arrayis the ideal product for use as board level protectionof ESD sensitive
semiconductor components.
The tiny SOT23-6L package allows design flexibilityin the designof “crowded” boards where the space
savingisata premium. This enablesto shorten the routing and can contributeto improve ESD
performance.
Circuit Board LayoutCircuit board layoutisa critical design stepin the suppressionof ESD induced transients. The following
guidelines are recommended: The ESDA6V1-4BC6 shouldbe placedas nearas possibleto the input terminalsor connectors. Minimise the path length between the ESD suppressor and the protected device Minimiseall conductive loops, including power and ground loops The ESD transient return pathto ground shouldbe keptas shortas possible. Use ground planes whenever possible.
ESDA6V1-4BC6
Note 1:Variationof parametersis givenby curves.
ABSOLUTE MAXIMUM RATINGS (Tamb= 25°C)
Note1: Square pulse, Ipp=3A, tp=2.5μs.
ELECTRICAL CHARACTERISTICS (Tamb= 25°C)
1.1 25 50 75 100 125 150
[T initial] / P [T initial=25°C]PPj PPj
Fig. 1: Relative variationof peak pulse power
versus initial junction temperature.
1000 10 100
(W)PP
Fig.2: Peak pulse power versus exponential pulse
duration.
ESDA6V1-4BC6100.0 5 10 15 20 25 30 35 40 45 50
(A)PP
Fig. 3: Clamping voltage versus peak pulse
current (typical values, rectangular waveform). 234 56
C(pF)
Fig.4: Junction capacitance versus line voltage
applied (typical values).
100 50 75 100 125
[T] / I[T =25°C]Rj Rj
Fig.5: Relative variationof leakage current versus
junction temperature (typical values).
ORDER CODE
Fig.6: Analog crosstalk test configuration.
Note2: Accordingto figure6 schematic.
ESDA6V1-4BC6
PACKAGE MECHANICAL DATASOT23-6L
FOOTPRINT
Packaging: Standard packagingis tape and reel.
MARKINGInformation furnishedisbelievedto beaccurateand reliable. However, STMicroelectronics assumes noresponsibilityforthe consequencesof
use ofsuch informationnor forany infringement ofpatentsor otherrightsofthirdpartieswhich may result fromitsuse. Nolicenseis grantedby
implicationor otherwise under any patentor patent rightsof STMicroelectronics. Specifications mentionedinthis publicationare subjectto
changewithout notice. This publication supersedesand replaces allinformation previously supplied.
STMicroelectronics productsarenot authorizedforuseas critical componentsinlife support devicesor systems without express writtenap-
provalof STMicroelectronics.
TheST logoisa registered trademarkof STMicroelectronics 2002 STMicroelectronics- Printedin Italy-All rights reserved.
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