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ESDA25B1RL
TRANSIL ARRAY FOR ESD PROTECTION
ESDA25B1October 1999 - Ed : 2
6 BIDIRECTIONAL TRANSIL FUNCTIONS
VERY LOW CAPACITANCE : C= 20 pF @ VRM
150 W peak pulse power (8/20 μs)
FEATURES
FUNCTIONAL DIAGRAM
DESCRIPTIONThe ESDA25B1 is a monolithic voltage suppressor
designed to protect components which are
connected to data and transmission lines against
EDS.
TRANSIL ARRAY
FOR ESD PROTECTION
Application Specific Discretes
A.S.D.
Where transient overvoltage protection in ESD
sensitive equipment is required, such as :
- COMPUTER
- PRINTERS
- COMMUNICATION SYSTEMS
It is particulary recommended for RS232 I/O port
protection where the line interface withstands only
2 kV ESD surges.
APPLICATIONS
BENEFITSHigh ESD protection level : up to 25 kV
High integration
Suitable for high density boards
IEC 1000-4-2 : level 4
MIL STD 883C-Method 3015-6 : class 3
(human body model)
COMPLIES WITH THE FOLLOWING STANDARDS :1/5
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C)
note 1 : Between any I/O pin and Groung
note 2 : Square pulse, Ipp = 25A, tp=2.5μs.
note 3 : Δ VBR = αT* (Tamb -25°C) * VBR (25°C)
ESDA25B12/5
The ESDA family has been designed to clamp fast
spikes like ESD. Generally the PCB designers
need to calculate easily the clamping voltage VCL.
This is why we give the dynamic resistance in
addition to the classical parameters. The voltage
across the protection cell can be calculated with
the following formula:
VCL = VBR + Rd IPP
Where Ipp is the peak current through the ESDA cell.
DYNAMIC RESISTANCE MEASUREMENT The short duration of the ESD has led us to prefer
a more adapted test wave, as below defined, to the
classical 8/20μs and 10/1000μs surges.
2.5μs duration measurement wave.
As the value of the dynamic resistance remains
stable for a surge duration lower than 20μs, the
2.5μs rectangular surge is well adapted. In addition
both rise and fall times are optimized to avoid any
parasitic phenomenon during the measurement of
Rd.
CALCULATION OF THE CLAMPING VOLTAGE
USE OF THE DYNAMIC RESISTANCE
ESDA25B13/5
25 50 75 100 125 1500.0Ppp[Tj initial]/Ppp[Tj initial=25°C]
Fig. 1 : Peak power dissipation versus initial
junction temperature. 25 30 35 40 45 50 55 600.1
Ipp(A)
Fig. 3 : Clamping voltage versus peak pulsecurrent (Tj initial = 25 °C).
Rectangular waveform tp = 2.5 μs.
110 10010
Ppp(W)
Fig. 2 : Peak pulse power versus exponential
pulse duration (Tj initial = 25 °C). 5 10 301
C(pF)
Fig. 4 : Capacitance versus reverse applied
voltage (typical values). 50 75 100 1251
200 [Tj]/I [Tj=25°C]RR
Fig. 5 : Relative variation of leakage current versus
junction temperature (typical values).
ESDA25B14/5
PACKAGE MECHANICAL DATASO-8 Plastic
Packaging : Preferred packaging is tape and reel.
Weight : 0.08g.. consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap-
proval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1999 STMicroelectronics - Printed in Italy - All rights reserved.
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MARKING : Logo, Date Code, E25B1
ORDER CODE
ESDA25B15/5
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