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EMIF09-SD01F3
9-line EMI filter and ESD protection for mini and micro SD card interfaces
April 2008 Rev 4 1/9
EMIF09-SD01F39-line IP AD™, EMI filter and ESD protection
Features 9-line EMI low-pass filter and ESD protection High efficiency in EMI filtering Lead-free package 400 µm pitch Very low PCB space occupation: < 4 mm2 Very thin package: 0.6 mm High reliability offered by monolithic integration Reduction of parasitic elements thanks to CSP
integration
Complies with the following standards IEC61000-4-2 level 4 on external pins: 15 kV (air discharge) 8 kV (contact discharge) IEC61000-4-2 level 2 on internal pins: 2 kV (air discharge) 2 kV (contact discharge) MIL STD 883F - Method 3015.7 Class 3
Application Secure digital memory card in mobile phones
and communication systems
DescriptionThe EMIF09-SD01F3 is a highly integrated array
designed to suppress EMI/RFI noise for secure
digital memory cards. The EMIF09-SD01F3 is in
a Flip Chip package to offer space saving and
high RF performance.
This low-pass filter includes ESD protection
circuitry, which prevents damage to the protected
device when subjected to ESD surges up 15 kV.
This filter also has a low line capacitance to be
compatible with high data rate signals.
Figure 1. Pin layout (bump side)
TM: IPAD is a trademark of STMicroelectronics.
Characteristics EMIF09-SD01F32/9
1 Characteristics
Figure 2. Device configuration GND bumps (GND_H and GND_C - A3, D3 and E3) must be connected to ground on the
printed circuit board for ESD testing and RF measurements.
Table 1. Pin-signal attribution
Table 2. Absolute ratings (limiting values)
EMIF09-SD01F3 Characteristics 3/9
Table 3. Electrical characteristics (Tamb = 25 °C)
Characteristics EMIF09-SD01F3
4/9
Figure 3. S21(dB) all lines attenuation
Figure 4. Analog cross talk measurement
Figure 5. Digital crosstalk measurement Figure 6. ESD response to IEC 61000-4-2
(+15 kV air discharge) on one input
(VIN) and on one output (VOUT)
Figure 7. ESD response to IEC 61000-4-2
(-15 kV air discharge) on one input
(VIN) and on one output (VOUT)
Figure 8. Line capacitance versus applied
voltage
EMIF09-SD01F3 Application information
5/9
2 Application information
Figure 9. Aplac model
Figure 10. Aplac model variables
Ordering information scheme EMIF09-SD01F3
6/9 Ordering information scheme
Figure 11. Ordering information scheme
4 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
.
Figure 12.
