EMIF06-10006F2 ,6 LINES EMI FILTER AND ESD PROTECTIONPin Configuration (ball side)2.92mm x 1.29mm ■ Very thin package: 0.65 mm ■ High efficiency in ESD ..
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EMIF06-1502M12 ,6-line low capacitance EMI filter and ESD protectionPin configuration (top view)■ High reducing of parasitic elements through integration and wafer lev ..
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ES1H ,1.0A Ultra Fast Recovery Rectifierapplications. • Glass passivated junction. • Low profile package.• Easy pick and place.• Built-in s ..
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EMIF06-10006F2
6 LINES EMI FILTER AND ESD PROTECTION
1/7
MAIN PRODUCT CHARACTERISTICSWhere EMI filtering in ESD sensitive equipment is
required: Mobile phones and communication systems Computers, printers and MCU Boards
DESCRIPTIONThe EMIF06-10006F2 is a highly integrated
devices designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF06 flip-chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV. This device
includes 6 EMIF filters.
BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Lead free package Very low PCB space consuming:
2.92mm x 1.29mm Very thin package: 0.65 mm High efficiency in ESD suppression
(IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through
integration and wafer level packaging
COMPLIES WITH THE FOLLOWING STANDARDS:IEC 61000-4-2 level 4:
15kV (air discharge)
8kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3: 30kV
EMIF06-10006F26 LINES EMI FILTER
AND ESD PROTECTION
REV. 2
November 2004
Figure 1: Pin Configuration (ball side)IPAD™
TM: IPAD is a trademark of STMicroelectronics.
Table 1: Order Code
EMIF06-10006F2
Figure 2: Basic Cell Configuration
Table 2: Absolute Ratings (limiting values)
Table 3: Electrical Characteristics (Tamb = 25 °C)
EMIF06-10006F23/7
Figure 3: S21 (dB) attenuation measurements
and Aplac simulation
Figure 4: Analog crosstalk measurements
Figure 5: Digital crosstalk measurements Figure 6: ESD response to IEC61000-4-2 (+15kV
air discharge) on one imput V(in) and one output
V(out)
Figure 7: ESD response to IEC61000-4-2 (–15kV
air discharge) on one imput V(in) and one output
V(out)
Figure 8: Line capacitance versus applied
voltage for filter
EMIF06-10006F2
Figure 9: Aplac model
Figure 10: Aplac parameters
EMIF06-10006F25/7
Figure 11: Ordering Information Scheme
Figure 12: FLIP-CHIP Package Mechanical Data
Figure 13: Foot print recommendations Figure 14: Marking
EMIF06-10006F2
Figure 15: FLIP-CHIP Tape and Reel Specification
Table 4: Ordering Information
Note: More packing informations are available in the application noteAN1235: “Flip-Chip: Package description and recommendations for use”
AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History