EMIF06-10006F1 ,6 LINES EMI FILTER AND ESD PROTECTIONPIN CONFIGURATION (ball side)n Very low PCB space consuming:2.92mm x 1.29mmn Very thin package: 0.6 ..
EMIF06-10006F2 ,6 LINES EMI FILTER AND ESD PROTECTIONPin Configuration (ball side)2.92mm x 1.29mm ■ Very thin package: 0.65 mm ■ High efficiency in ESD ..
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ES1H ,1.0A Ultra Fast Recovery Rectifierapplications. • Glass passivated junction. • Low profile package.• Easy pick and place.• Built-in s ..
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EMIF06-10006F1
6 LINES EMI FILTER AND ESD PROTECTION
EMIF06-10006F1January 2003 - Ed: 1
PIN CONFIGURATION (ball side)6 LINES EMI FILTER
AND ESD PROTECTIONIPADTM
: IPADisa trademarkof STMicroelectronics.
IEC 61000-4-2 level4:
15kV (air discharge)kV (contact discharge)
MIL STD 883E- Method 3015-6 Class3
COMPLIES WITHTHE FOLLOWING STANDARDS: EMI symmetrical (I/O) low-pass filter High efficiencyin EMI filtering Very lowPCB space consuming:
2.92mmx 1.29mm Very thin package: 0.65 mm High efficiencyin ESD suppression
(IEC61000-4-2 level4) High reliability offeredby monolithic integration High reducingof parasitic elements through
integration and wafer level packaging.
BENEFITSWhere EMI filteringin ESDsensitive equipmentis required: Mobile phones and communication systems Computers, printers and MCU Boards
MAIN PRODUCT CHARACTERISTICSThe EMIF06-10006F1isa highly integrated devices
designedto suppress EMI/RFI noiseinall systems
subjected to electromagnetic interferences. The
EMIF04 flip-chip packaging means the package size equalto the die size.
This filter includesan ESD protection circuitry which
preventsthe device from destruction when subjected ESD surges up 15kV. This device includes four
EMIF filters and4 separated ESD diodes.
DESCRIPTION
BASICCELLCONFIGURATION
EMIF06-10006F1
ABSOLUTE RATINGS (limiting values)
ELECTRICAL CHARACTERISTICS (Tamb =25°C)
EMIF06-10006F1 3M 10M 30M 100M 300M 1G 3G
Aplac7.62 User:ST Microelectronics 3M 10M 30M 100M 300M 1G 3G
Aplac7.62 User:ST Microelectronics
Fig.1: S21 (dB) attenuation measurements and
Aplac simulation.
Aplac 7.62 User: ST Microelectronics
100k 1M 10M 100M 1G
Aplac 7.62 User:ST Microelectronics
Fig.2: Analog crosstalk measurements.
Fig.3: Digital crosstalk measurements.
Fig.4: ESD responseto IEC61000-4-2 (+15kVair
discharge)on one input V(in) and one output V(out).
Fig.5: ESD responseto IEC61000-4-2 (-15kVair
discharge)on one input V(in) and one outputV(out).
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 (V)R
C(pF)
Fig.6: Line capacitance versus applied voltagefor
filter.
EMIF06-10006F1
Aplac model
Aplac parameters
EMIF06-10006F1
ORDER CODE
PACKAGE MECHANICAL DATA
MARKING
FOOT PRINT RECOMMENDATIONS
EMIF06-10006F1Information furnishedis believedtobeaccurateandreliable.However,STMicroelectronics assumesno responsibility fortheconsequencesof
useofsuchinformationnorfor anyinfringementof patentsorother rightsof third parties whichmayresultfromits use.Nolicenseisgrantedby
implicationor otherwise underany patentor patent rightsof STMicroelectronics. Specifications mentionedinthis publicationare subjectto
change without notice. This publication supersedes and replacesall information previously supplied.
STMicroelectronics productsarenot authorizedfor useas critical componentsinlife support devicesor systems without express written
approval ofSTMicroelectronics.
TheST logoisa registered trademarkof STMicroelectronics 2003 STMicroelectronics- Printedin Italy-All rights reserved.
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Note: More packing informations are availablein the application note AN1235: ''Flip-Chip: Package description and
recommandationsfor use''
FLIP-CHIP TAPE AND REEL SPECIFICATION
OTHER INFORMATION
