DS92LV18TVV ,18-Bit Bus LVDS Serializer/DeserializerFeaturesn 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376The DS92LV18 Serializer/Deserializer (S ..
DS92LV18TVV/NOPB ,18-Bit Bus LVDS Serializer/DeserializerFEATURES DESCRIPTIONThe DS92LV18 Serializer/Deserializer (SERDES) pair2• 15–66 MHz 18:1/1:18 Serial ..
DS92LV222A ,Two Channel Bus LVDS MUXed RepeaterElectrical Characteristics±T = −40˚C to +85˚C unless otherwise noted, V = 3.3V 0.3V (Notes 2, 3)A C ..
DS92LV222ATM ,Two Channel Bus LVDS MUXed RepeaterElectrical Characteristics±T = −40˚C to +85˚C unless otherwise noted, V = 3.3V 0.3V (Notes 2, 3)A C ..
DS92LV8028TUF ,8 Channel 10:1 Serializerapplications. Each serializer block in thedata streams with embedded clockDS92LV8028 operates indep ..
DS92LV8028TUF/NOPB ,8 Channel 10:1 Serializer 196-NFBGA -40 to 85FEATURES DESCRIPTIONThe DS92LV8028 integrates eight serializer devices2• All 8 Channels Synchronous ..
ED1402 ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
ED1402E ,NPN general purpose transistor
DS92LV18TVV
18-Bit Bus LVDS Serializer/Deserializer
DS92LV18
18-Bit Bus L VDS Serializer/Deserializer- 15-66 MHz
General DescriptionThe DS92LV18 Serializer/Deserializer (SERDES) pair trans-
parently translatesa 18–bit parallel bus intoa BLVDS serial
stream with embedded clock information. This single serial
stream simplifies transferringa 18-bit,or less, bus over PCB
traces and cablesby eliminatingthe skew problems between
parallel data and clock paths.It saves system costby nar-
rowing data paths thatin turn reduce PCB layers, cable
width, and connector size and pins.
This SERDES pair includes built-in system and device test
capability. The line loopback feature enables the userto
check the integrityof the serial data transmission pathsof
the transmitter and receiver while deserializing the serial
datato parallel dataatthe receiver outputs. The local loop-
back feature enables the userto check the integrityof the
transceiver from the local parallel-bus side.
The DS92LV18 incorporates modified BLVDS signalingon
the high-speed I/O. BLVDS providesa low power and low
noise environmentfor reliably transferring data overa serial
transmission path. The equal and opposite currents through
the differential data path control EMIby coupling the result-
ing fringing fields together.
Features 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376
Gbpsfull duplex throughput) Independent transmitter and receiver operation with
separate clock, enable, and power down pins Hot plug protection (powerup high impedance) and
synchronization (receiver locksto random data) Wide ±5% reference clock frequency tolerancefor easy
system design using locally-generated clocks Line and local loopback modes Robust BLVDS serial transmission across backplanes
and cablesfor low EMI No external coding required Internal PLL,no external PLL components required Single +3.3V power supply Low power: 90mA (typ) transmitter, 100mA (typ)at66
MHz with PRBS-15 pattern ±100 mV receiver input threshold Lossof lock detection and reportingpin Industrial −40to +85˚C temperature range >2.0kV HBM ESD Compact, standard 80-pin PQFP package
Block Diagram
DS92LV18October 2003
DS92L
V18
18-Bit
Bus
VDS
Serializer/Deserializer
MHz
