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DS92LV18TVV/NOPB |DS92LV18TVVNOPBNSN/a1190avai18-Bit Bus LVDS Serializer/Deserializer


DS92LV18TVV/NOPB ,18-Bit Bus LVDS Serializer/DeserializerFEATURES DESCRIPTIONThe DS92LV18 Serializer/Deserializer (SERDES) pair2• 15–66 MHz 18:1/1:18 Serial ..
DS92LV222A ,Two Channel Bus LVDS MUXed RepeaterElectrical Characteristics±T = −40˚C to +85˚C unless otherwise noted, V = 3.3V 0.3V (Notes 2, 3)A C ..
DS92LV222ATM ,Two Channel Bus LVDS MUXed RepeaterElectrical Characteristics±T = −40˚C to +85˚C unless otherwise noted, V = 3.3V 0.3V (Notes 2, 3)A C ..
DS92LV8028TUF ,8 Channel 10:1 Serializerapplications. Each serializer block in thedata streams with embedded clockDS92LV8028 operates indep ..
DS92LV8028TUF/NOPB ,8 Channel 10:1 Serializer 196-NFBGA -40 to 85FEATURES DESCRIPTIONThe DS92LV8028 integrates eight serializer devices2• All 8 Channels Synchronous ..
DS92UT16TUF ,Utopia-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfersfeatures such as an optional 1:1 protection— Internal buffers allow maximum LVDS serial bit rateand ..
ED1402 ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
ED1402E ,NPN general purpose transistor


DS92LV18TVV/NOPB
18-Bit Bus LVDS Serializer/Deserializer
DS92LV18
www.ti.com
SNLS156E –SEPTEMBER 2003–REVISED APRIL 2013
DS92LV18 18-Bit Bus LVDS Serializer/Deserializer- 15-66 MHz
Checkfor Samples: DS92LV18
1FEATURES DESCRIPTION

The DS92LV18 Serializer/Deserializer (SERDES) pair 15–66 MHz 18:1/1:18 Serializer/Deserializer transparently translatesa 18–bit parallel bus intoa(2.376 Gbps Full Duplex Throughput) BLVDS serial stream with embedded clock• Independent Transmitter and Receiver information. This single serial stream simplifiesOperation with Separate Clock, Enable, and transferringa 18-bit, or less, bus over PCB traces
Power Down Pins
and cables by eliminating the skew problems
between parallel data and clock paths.It saves• Hot Plug Protection (Power Up High system cost by narrowing data paths thatin turnImpedance) and Synchronization (Receiver reduce PCB layers, cable width, and connector sizeLocksto Random Data) and pins.• Wide ±5% Reference Clock Frequency
This SERDES pair includes built-in system andTolerance for Easy System Design Using device test capability. The line loopback featureLocally-Generated Clocks enables the userto check the integrityof the serial• Line and Local Loopback Modes data transmission paths of the transmitter and Robust BLVDS Serial Transmission Across receiver while deserializing the serial datato parallel
Backplanes and Cables for Low EMI
data at the receiver outputs. The local loopback
feature enables the userto check the integrityof the• No External Coding Required transceiver from the local parallel-bus side.• Internal PLL, No External PLL Components
The DS92LV18 incorporates modified BLVDSRequired signaling on the high-speed I/O. BLVDS providesa• Single +3.3V Power Supply low power and low noise environment for reliably• Low Power: 90mA (typ) Transmitter, 100mA transferring data overa serial transmission path. The
(typ)at66 MHz with PRBS-15 Pattern
equal and opposite currents through the differential
data path control EMI by coupling the resulting• ±100 mV Receiver Input Threshold fringing fields together.• Lossof Lock Detection and Reporting Pin Industrial −40to +85°C Temperature Range >2.0kV HBM ESD Compact, Standard 80-Pin LQFP Package
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