DS92LV1260TUJB ,six 1 to 10 deserializersElectrical Characteristics (Continued)Basic functionality and specifications per deserializer chann ..
DS92LV1260TUJB/NOPB ,six 1 to 10 deserializers 196-NFBGA -40 to 85Electrical Characteristics (continued)Basic functionality and specifications per deserializer chann ..
DS92LV16TVHG ,16-Bit Bus LVDS Serializer/Deserializerfeaturesn Robust BLVDS serial transmission across backplanesprovide the following functionality: th ..
DS92LV16TVHGX ,16-Bit Bus LVDS Serializer/DeserializerFeaturesn 25–80 MHz 16:1/1:16 serializer/deserializer (2.56GbpsThe DS92LV16 Serializer/Deserializer ..
DS92LV18TVV ,18-Bit Bus LVDS Serializer/DeserializerFeaturesn 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376The DS92LV18 Serializer/Deserializer (S ..
DS92LV18TVV/NOPB ,18-Bit Bus LVDS Serializer/DeserializerFEATURES DESCRIPTIONThe DS92LV18 Serializer/Deserializer (SERDES) pair2• 15–66 MHz 18:1/1:18 Serial ..
ED1402 ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402B ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
ED1402C ,NPN general purpose transistor
DS92LV1260TUJB
six 1 to 10 deserializers
DS92LV1260
Six Channel 10 Bit BLVDS Deserializer
General DescriptionThe DS92LV1260 integratessix deserializer devices intoa
single chip. The chip usesa 0.25u CMOS process technol-
ogy. The DS92LV1260 can simultaneously deserializeupto
six data streams that have been serializedby the National
Semiconductor DS92LV1021or DS92LV1023 Bus LVDSse-
rializers. The device also includesa seventh serial input
channel that servesasa redundant input.
Each deserializer blockin the DS92LV1260 operates inde-
pendently withits own clock recovery circuitry and lock-
detect signaling.
The DS92LV1260 usesa single +3.3V power supply witha
typical power dissipationof 1.2Wat 3.3V witha PRBS-15
pattern. Referto the Connection Diagramsfor packaging
information.
Features Deserializes onetosix BusLVDS input serial data
streams with embedded clocks Seven selectable serial inputsto support n+1
redundancyof deserialized streams Seventh channel has singlepin monitor output that
reflects input from seventh channel input Parallel clock rateupto 40MHz On chip filteringfor PLL Absolute maximum worst case power dissipation=
1.9Wat 3.6V High impedance inputs upon poweroff (Vcc= 0V) Single power supplyat +3.3V 196-pin LBGA package (Low-profile Ball Grid Array)
package Industrial temperature range operation: −40˚Cto +85˚C
Block Diagram
ApplicationAugust 2003
DS92L
V1260
Six
Channel
Bit
VDS
Deserializer
