DS92LV1023EMQ/NOPB ,30-66 MHz 10-Bit Serializer 28-SSOP -40 to 85 SNLS187B –MARCH 2005–REVISED APRIL 2013Data TransferAfter initialization, the Serializer will acce ..
DS92LV1023TMSA ,40 MHz-66MHz 10-Bit SerializerFeaturestransforms it back into a 10-bit wide parallel data bus andn Clock recovery from PLL lock t ..
DS92LV1023TMSA/NOPB ,40-66 MHz 10-Bit Serializer 28-SSOP SNLS049D –MAY 2000–REVISED APRIL 2013Data TransferAfter initialization, the Serializer will accept ..
DS92LV1023TMSAX ,40 MHz-66MHz 10-Bit SerializerBlock Diagrams10093301®TRI-STATE is a registered trademark of National Semiconductor Corporation. 2 ..
DS92LV1210TMSA ,16 MHzGeneral Description®pins may be TRI-STATE to achieve a high impedanceThe DS92LV1021 transforms a 10 ..
DS92LV1210TMSA ,16 MHzBlock Diagrams (Continued)Application10011002Control of the sync pins is left to the user. A feedba ..
DS92LV1023EMQ/NOPB
30-66 MHz 10-Bit Serializer
PAR
SER
IAL
DO+
DO-
DEN
SER
IAL
-PAR
PLL
RI+
RI-
LVDS
ROUT
REFCLK
LOCK
CLOCK
RECOVERY
REN
(30 MHz to 66 MHz)
RCLK_R/F
DS92LV1023E 10-Bit DeserializerRCLK
DS92LV1023E
www.ti.com SNLS187B –MARCH 2005–REVISED APRIL 2013
DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer
Checkfor Samples: DS92LV1023E
1FEATURES DESCRIPTIONThe DS92LV1023Eisa 300to 660 Mb/s serializer for
30–66 MHz Single 10:1 Serializer with 300–660 high-speed unidirectional serial data transmission
Mb/s Throughput over FR-4 printed circuit board backplanes and
• Robust Bus LVDS Serial Data Transmission balanced copper cables.It transformsa 10-bit wide
with Embedded Clock for Exceptional Noise parallel LVCMOS/LVTTL data bus intoa single high
Immunity and Low EMI speed Bus LVDS serial data stream with embedded
clock. This single serial data stream simplifies PCB
• >10 kV HBM ESD Protection on Bus LVDS design and reduces PCB cost by narrowing data
Output Pins paths thatin turn reduce PCB size and numberof
• Transition Every Data Transfer Cycle Ensured layers. The single serial data stream also reduces
Low Power Consumption< 250 mW (typ)at66 cable size, the numberof connectors, and eliminates
MHz clock-to-data and data-to-data skew.
Single Differential Pair Eliminates Multichannel The DS92LV1023E works well with any TI
Skew Semiconductor's Bus LVDS 10–bit deserializer within
its specified frequency operating range.It features
• Flow-Through Pinout for Easy PCB Layout exceptional ESD protection, pin selectable edge
• Programmable Edge Trigger on Clock trigger on clock, and high impedance outputs in
• High Impedance on Driver Outputs When power down mode.
Poweris Off The DS92LV1023E was designed with the flow-
• Bus LVDS Serial Output Rated for 27Ω Load through pinout andis availableina space saving
Small 28-Lead SSOP Package 28–lead SSOP package.
Block Diagrams
