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DS90LV031BTM-DS90LV031BTMX Fast Delivery,Good Price
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DS90LV031BTMNSCN/a269avai3V LVDS Quad CMOS Differential Line Driver
DS90LV031BTMNSN/a2409avai3V LVDS Quad CMOS Differential Line Driver
DS90LV031BTMXNSN/a1000avai3V LVDS Quad CMOS Differential Line Driver


DS90LV031BTM ,3V LVDS Quad CMOS Differential Line Driverapplications requiring ultra low power dissipa- n 0.1 ns typical differential skewtion and high dat ..
DS90LV031BTM ,3V LVDS Quad CMOS Differential Line Driverapplications.Connection Diagram Functional DiagramDual-In-Line10131101Order Number DS90LV031BTMSee ..
DS90LV031BTMX ,3V LVDS Quad CMOS Differential Line DriverElectrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise sp ..
DS90LV032 ,3V LVDS Quad CMOS Differential Line Receiverapplications requiring ultra low power dissipa- 100 Mbps (50 MHz) switching ratestion and high data ..
DS90LV032A ,3V LVDS Quad CMOS Differential Line ReceiverElectrical CharacteristicsOver Supply Voltage and Operating Temperature ranges, unless otherwise sp ..
DS90LV032ATM ,3V LVDS Quad CMOS Differential Line ReceiverMICROCIRCUIT DATA SHEETOriginal Creation Date: 2/21/00MNDS90LV032A-X REV 0D0Last Update Date: 11/10 ..


DS90LV031BTM-DS90LV031BTMX
3V LVDS Quad CMOS Differential Line Driver
DS90LV031B LVDS Quad CMOS Differential Line Driver
General Description

The DS90LV031Bisa quad CMOS differential line driver
designedfor applications requiring ultra low power dissipa-
tion and high data rates. The deviceis designedto support
data ratesin excessof 400 Mbps (200 MHz) utilizing Low
Voltage Differential Signaling (LVDS) technology.
The DS90LV031B accepts low voltage TTL/CMOS input lev-
els and translates themto low voltage (350 mV) differential
output signals.In additionthe driver supportsa TRI-STATE®
function that maybe usedto disable the output stage, dis-
abling the load current, and thus droppingthe devicetoan
ultra low idle power state of 13 mW typical. The
DS90LV031Bis enhanced overthe DS90LV031Ain thatthe
inputs are further ruggedizedfor excessive undershoot.
The EN and EN* inputs allow active Lowor active High
controlof the TRI-STATE outputs. The enablesare commonall four drivers. The DS90LV031B and companion line
receiver (DS90LV032A) providea new alternativeto high
power pseudo-ECL devicesfor high speed point-to-point
interface applications.
Features
>400 Mbps (200 MHz) switching rates 0.1ns typical differential skew 0.4ns maximum differential skew 2.0ns maximum propagation delay Ruggedized inputs that can withstand excessive
undershoot 3.3V power supply design ±350 mV differential signaling Low power dissipation (13mWat 3.3V static) Interoperable with existing5V LVDS devices Compatible with IEEE 1596.3 SCI LVDS standard Compatible with TIA/EIA-644 LVDS standard Industrial temperature operating range Availablein SOIC surface mount packaging
Connection Diagram
Dual-In-Line

Order Number DS90LV031BTM
See NS Package Number M16A
Truth Table
DRIVER
Enables Input Outputs EN* DIN DOUT+ DOUT− X Z Z
All other combinationsof
ENABLE inputs H L
Functional Diagram

January 2003
DS90L
V031B
VDS
Quad
CMOS
Differential
Line
Driver
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