DS90LV028ATMX ,3V LVDS Dual CMOS Differential Line ReceiverElectrical CharacteristicsOver Supply Voltage and Operating Temperature ranges, unless otherwise sp ..
DS90LV028ATMX/NOPB ,3V LVDS Dual CMOS Differential Line Receiver 8-SOIC -40 to 85Features 3 DescriptionThe DS90LV028A is a dual CMOS differential line1• >400-Mbps (200 MHz) Switchi ..
DS90LV031A ,3V LVDS Quad CMOS Differential Line DriverElectrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise sp ..
DS90LV031ATM ,3V LVDS Quad CMOS Differential Line DriverGeneral DescriptionThe DS90LV031A is a quad CMOS differential line driver utilizing Low VoltageDiff ..
DS90LV031ATMTC ,3V LVDS Quad CMOS Differential Line DriverElectrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise sp ..
DS90LV031ATMTC ,3V LVDS Quad CMOS Differential Line Driverapplications requiring ultra low power dissipation n 0.1 ns typical differential skewand high data ..
DS90LV028ATLD-DS90LV028ATM-DS90LV028ATMX
3V LVDS Dual CMOS Differential Line Receiver
DS90LV028A LVDS Dual CMOS Differential Line Receiver
General DescriptionThe DS90LV028Aisa dual CMOS differential line receiver
designedfor applications requiring ultra low power dissipa-
tion,low noise and high data rates. Thedeviceis designedto
support data ratesin excessof 400 Mbps (200 MHz) utilizing
Low Voltage Differential Signaling (LVDS) technology.
The DS90LV028A accepts low voltage (350 mV typical) dif-
ferential input signals and translates themto 3V CMOS
output levels. The receiver also supports open, shorted and
terminated (100Ω) input fail-safe. The receiver outputwillbe
HIGHforall fail-safe conditions. The DS90LV028A hasa
flow-through designfor easy PCB layout.
The DS90LV028Aand companion LVDS line driver providea
new alternativeto high power PECL/ECL devicesfor high
speed point-to-point interface applications.
Features >400 Mbps (200 MHz) switching rates50ps differential skew (typical) 0.1ns channel-to-channel skew (typical) 2.5ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedanceon LVDS inputs Low Power design (18mW@ 3.3V static) Interoperable with existing5V LVDS networks Accepts small swing (350 mV typical) differential signal
levels Supports open, short and terminated input fail-safe Conformsto ANSI/TIA/EIA-644 Standard Industrial temperature operating range
(−40˚Cto +85˚C) Availablein SOIC and space saving LLP package
Connection Diagrams
SOICOrder Number DS90LV028ATM
See NS Package Number M08A
LLP (Top View)
Order Number DS90LV028ATLD
See NS Package Number LDC08A
Functional Diagram
Truth Table
INPUTS OUTPUT
[RIN+]−[RIN−] ROUT
VID≥ 0.1V H
VID≤ −0.1V L
Full Fail-safe
OPEN/SHORT Terminated
January 2003
DS90L
V028A
VDS
Dual
CMOS
Differential
Line
Receiver
