DS90LV018ATMX ,3V LVDS Single CMOS Differential Line ReceiverElectrical Characteristics” specifies conditions of device operation.Note2: Current into device pin ..
DS90LV018ATMX/NOPB ,3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85FEATURES DESCRIPTIONThe DS90LV018A is a single CMOS differential line2• >400 Mbps (200 MHz) Switchi ..
DS90LV019TM ,3.3V or 5V LVDS Driver/Receiverfeatures a flow-through pin out which allowsn ±100 mV Receiver Sensitivityeasy PCB routing for shor ..
DS90LV019TM/NOPB ,3.3V or 5V LVDS Driver/Receiver 14-SOIC -40 to 85Maximum Ratings (Note 1) Derate SOIC Package 7.7mW/˚CTSSOP 790 mWIf Military/Aerospace specified de ..
DS90LV019TMTC ,3.3V or 5V LVDS Driver/Receiverfeatures an independentn Glitch free power up/down (Driver disabled)driver and receiver with TTL/CM ..
DS90LV019TMTCX ,3.3V or 5V LVDS Driver/ReceiverFeaturesn LVDS SignalingThe DS90LV019 is a Driver/Receiver designed specificallyfor the high speed ..
DS90LV018ATM-DS90LV018ATMX
3V LVDS Single CMOS Differential Line Receiver
DS90LV018A LVDS Single CMOS Differential Line Receiver
General DescriptionThe DS90LV018Aisa single CMOS differential line receiver
designedfor applications requiring ultra low power dissipa-
tion,low noise and high data rates. Thedeviceis designedto
support data ratesin excessof 400 Mbps (200 MHz) utilizing
Low Voltage Differential Signaling (LVDS) technology.
The DS90LV018A accepts low voltage (350 mV typical) dif-
ferential input signals and translates themto 3V CMOS
output levels. The receiver also supports open, shorted and
terminated (100Ω) input fail-safe. The receiver outputwillbe
HIGHforall fail-safe conditions. The DS90LV018A hasa
flow-through designfor easy PCB layout.
The DS90LV018Aand companion LVDS line driver providea
new alternativeto high power PECL/ECL devicesfor high
speed point-to-point interface applications.
Features >400 Mbps (200 MHz) switching rates50ps differential skew (typical) 2.5ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedanceon LVDS inputs Low Power design (18mW@ 3.3V static) Interoperable with existing5V LVDS networks Accepts small swing (350 mV typical) differential signal
levels Supports open, short and terminated input fail-safe Conformsto ANSI/TIA/EIA-644 Standard Industrial temperature operating range
(−40˚Cto +85˚C) Availablein SOIC package
Connection Diagram
SOICOrder Number DS90LV018ATM
See NS Package Number M08A
Functional Diagram
Truth Table
INPUTS OUTPUT
[RIN+]−[RIN−] ROUT
VID≥ 0.1V H
VID≤ −0.1V L
Full Fail-safe
OPEN/SHORT H Terminated
January 2003
DS90L
V018A
VDS
Single
CMOS
Differential
Line
Receiver
