DS90CR486VS ,DeserializerElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90CR486VS/NOPB ,Deserializer 100-TQFP -10 to 70FEATURESgenerations of Channel Link devices and offers2• Up to 6.384 Gbps Throughputhigher bandwidt ..
DS90CR561MTD ,LVDS 18-Bit Color Flat Panel Display (FPD) Link [Life-time buy]General Descriptionproblems associated with wide, high speed TTL interfaces.The DS90CR561 transmitt ..
DS90CR561MTDX ,LVDS 18-Bit Color Flat Panel Display (FPD) Link [Life-time buy]Block DiagramsDS90CR561 DS90CR562DS012470-27 DS012470-1Order Number DS90CR561MTD Order Number DS90C ..
DS90CR562MTD ,LVDS 18-Bit Color Flat Panal Display (FPD) Link [Life-time buy]General Descriptionproblems associated with wide, high speed TTL interfaces.The DS90CR561 transmitt ..
DS90CR562MTDX ,LVDS 18-Bit Color Flat Panal Display (FPD) Link [Life-time buy]Featuresdata streams. A phase-locked transmit clock is transmitted inn Up to 105 Megabyte/sec bandw ..
DS90CR486VS
Deserializer
DS90CR486
133MHz 48-Bit Channel Link Deserializer (6.384 Gbps)
General DescriptionThe DS90CR486 receiver converts eight Low Voltage Differ-
ential Signaling (LVDS) data streams back into48 bitsof
LVCMOS/LVTTL data. Usinga 133MHz clock, the data
throughputis 6.384Gbit/s (798Mbytes/s).
The multiplexingof data lines providesa substantial cable
reduction. Long distance parallel single-ended buses typi-
cally requirea ground wire per active signal (and have very
limited noise rejection capability). Thus,fora 48-bit wide
data and one clock,upto98 conductors are required. With
this Channel Link chipsetas fewas19 conductors(8 data
pairs,1 clock pair anda minimumof one ground) are
needed. This providesan 80% reductionin interconnect
width, which providesa system cost savings, reduces con-
nector physical size and cost, and reduces shielding require-
ments dueto the cables’ smaller form factor.
The DS90CR486 deserializeris improved over prior genera-
tionsof Channel Link devices and offers higher bandwidth
support and longer cable drive with three areasof enhance-
ment.To increase bandwidth, the maximum clock rateis
increasedto 133 MHz and8 serialized LVDS outputs are
provided. Cable driveis enhanced witha user selectable
pre-emphasis (on DS90CR485) feature that provides addi-
tional output current during transitionsto counteract cable
loading effects. Optional DC balancingona cycle-to-cycle
basis,is also providedto reduceISI (Inter-Symbol Interfer-
ence). With pre-emphasis andDC balancing,a low distortion
eye-patternis providedat the receiver endof the cable.A
cable deskew capability has been addedto deskew long
cablesof pair-to-pair skew.These three enhancements allow
long cablestobe driven.
The DS90CR486is intended to be used with the
DS90CR485 Channel Link Serializer.Itis also backward
compatible with serializers DS90CR481 and DS90CR483.
The DS90CR486 is footprint compatible with the
DS90CR484.
The chipsetisan ideal solutionto solve EMI and intercon-
nect size problemsfor high-throughput point-to-point appli-
cations.
For more details, please refertothe “Applications Informa-
tion” sectionof this datasheet.
Features Upto 6.384 Gbps throughput 66MHzto 133MHz input clock support Reduces cable and connector size and cost Cable Deskew function DC balance reducesISI distortion For point-to-point backplaneor cable applications Low power, 890 mWtypat 133MHz Flow through pinoutfor easy PCB design +3.3V supply voltage 100-pin TQFP package Conformsto TIA/EIA-644-A-2001 LVDS Standard
Generalized Block DiagramMarch 2003
DS90CR486
133MHz
48-Bit
Channel
Link
Deserializer
(6.384
Gbps)
