DS90CR215 ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkFeaturesparallel with the data streams over a fourth LVDS link. Everyn Single +3.3V supplycycle of ..
DS90CR215 ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkBlock DiagramsDS90CR215 DS90CR216DS012909-1DS012909-27Order Number DS90CR215MTDOrder Number DS90CR2 ..
DS90CR215MTD ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkGeneral Descriptioncombinations. For example, five 4-bit nibbles plus 1 control,The DS90CR215 trans ..
DS90CR215MTDX ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkFeaturesparallel with the data streams over a fourth LVDS link. Everyn Single +3.3V supplycycle of ..
DS90CR215MTDX/NOPB ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkFEATURES DESCRIPTIONThe DS90CR215 transmitter converts 21 bits of2• Single +3.3V SupplyCMOS/TTL dat ..
DS90CR216 ,+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel LinkFeaturesparallel with the data streams over a fourth LVDS link. Everyn Single +3.3V supplycycle of ..
DS90CR215
+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link
DS90CR215/DS90CR216
+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel
Link- 66 MHz
General DescriptionThe DS90CR215 transmitter converts21bitsof CMOS/TTL
data into three LVDS (Low Voltage Differential Signaling)
data streams.Aphase-locked transmit clock istransmittedin
parallelwiththe data streams overa fourth LVDSlink. Every
cycleofthe transmit clock21bitsof input dataare sampled
and transmitted. The DS90CR216 receiver convertsthe
LVDS data streams backinto21bitsof CMOS/TTL data.At transmitclock frequencyof 66MHz,21 bitsofTTL dataare
transmittedata rateof 462 Mbpsper LVDS data channel.
Usinga66 MHz clock,the data throughputis 1.386 Gbit/s
(173 Mbytes/s).
The multiplexingofthe data lines providesa substantial
cable reduction. Long distance parallel single-ended buses
typically requirea ground wireper active signal (and have
verylimited noiserejectioncapability).Thus,fora 21-bit wide
dataandone clock,upto44 conductorsare required. With
the Channel Link chipsetasfewas9 conductors(3 data
pairs,1 clock pair anda minimumof one ground)are
needed. This providesa 80% reductionin required cable
width, which providesa system cost savings, reduces con-
nector physicalsizeand cost,and reduces shielding require-
mentsduetothe cables’ smaller form factor.
The21 CMOS/TTL inputs can supporta varietyof signal
combinations.For example,five 4-bit nibbles plus1 control,two 9-bit (byte+ parity)and3 control.
Features Single +3.3V supply Chipset(Tx+Rx) power consumption <250 mW (typ) Power-down mode (<0.5 mW total)Upto173 Megabytes/sec bandwidthUpto 1.386 Gbps data throughput Narrowbus reduces cable size 290mV swing LVDS devicesforlowEMI +1V common mode range (around +1.2V) PLL requiresno external components Low profile 48-lead TSSOP package Rising edge data strobe Compatible with TIA/EIA-644 LVDS standard ESD Rating> 7kV Operating Temperature: −40˚Cto +85˚C
Block DiagramsTRI-STATE®isa registeredtrademark ofNationalSemiconductorCorporation.
DS90CR215DS012909-1
Order Number DS90CR215MTD
SeeNS Package Number MTD48
DS90CR216DS012909-27
Order Number DS90CR216MTD
SeeNS Package Number MTD48March 1999
DS90CR215/DS90CR216
+3.3V
Rising
Edge
Data
Strobe
VDS
21-Bit
Channel
Link-66
MHz 1999 National Semiconductor Corporation DS012909
