DS90C385AMTX ,LVDS Transmitter Flat Panel Display 85MHzElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90C385AMTX/NOPB ,LVDS Transmitter Flat Panel Display 85MHz 56-TSSOP -10 to 70features• No Special Start-Up Sequence Requiredand improvements making it an ideal replacement forb ..
DS90C385MTD ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz/ +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C385MTDX ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHzFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C387 ,Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGAFeaturesn Complies with OpenLDI specification for digital displayThe DS90C387/DS90CF388 transmitter ..
DS90C387AVJD ,Dual Pixel LVDS Display Interface / FPD-Link TransmitterFeaturessecond).n Supports SVGA through QXGA panel resolutionsThe LDI chipset is improved over prio ..
DS90C385AMT-DS90C385AMTX
LVDS Transmitter Flat Panel Display 85MHz
DS90C385A
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display Link-85 MHz
General DescriptionThe DS90C385Aisapintopin compatible replacementfor
DS90C383, DS90C383A and DS90C385. The DS90C385A
has additional features and improvements makingitan ideal
replacementfor DS90C383, DS90C383A and DS90C385.
familyof LVDS Transmitters.
The DS90C385A transmitter converts28 bitsof LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signal-
ing) data streams.A phase-locked transmit clockis transmit-
tedin parallel with the data streams over the fifth LVDS link.
Every cycleof the transmit clock28 bitsof input data are
sampled and transmitted.Ata transmit clock frequencyof85
MHz,24 bitsof RGB data and3 bitsof LCD timing and
control data (FPLINE, FPFRAME, DRDY)are transmittedat rateof 595 Mbpsper LVDS data channel. Usinga85 MHz
clock, the data throughputis 297.5 Mbytes/sec. This trans-
mitter canbe programmedfor Rising edge strobeor Falling
edge strobe througha dedicated pin.A Rising edgeor
Falling edge strobe transmitterwill interoperate witha Falling
edge strobe FPDLink Receiver without any translation logic.
This chipsetisan ideal meansto solve EMI and cable size
problems associated with wide, high-speed TTL interfaces
with added Speed Spectrum Clocking support.
Features Pin-to-pin compatibleto DS90C383, DS90C383A and
DS90C385. No special start-up sequence required between
clock/data and /PD pins. Input signals (clock and data)
canbe applied either beforeor afterthe deviceis
powered. Support Spread Spectrum Clockingupto 100kHz
frequency modulation& deviationsof ±2.5% center
spreador -5% down spread. “Input Clock Detection” feature will pullall LVDS pairsto
logic low when input clockis missing and when /PDpin logic high.18to85 MHz shift clock supportTx power consumption< 147 mW (typ)@85 MHz
GrayscaleTx Power-down mode<60 µW (typ) Supports VGA, SVGA, XGA, SXGA(dual pixel),
SXGA+(dual pixel), UXGA(dual pixel). Narrow bus reduces cable size and cost Upto 2.38 Gbps throughput Upto 297.5 Megabytes/sec bandwidth 345 mV (typ) swing LVDS devicesfor low EMI PLL requiresno external components Compliantto TIA/EIA-644 LVDS standard Low profile 56-lead TSSOP package
Block Diagram
DS90C385AOrder Number DS90C385AMT
See NS Package Number MTD56
PRELIMINARY
July 2004
DS90C385A
+3.3V
Programmable
VDS
ransmitter
24-bit
Flat
Panel
Display
(FPD)
Link-85
