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DS8641N
Quad Unified Bus Transceiver
DS8641
Quad Unified Bus Transceiver
General DescriptionThe DS8641isa quad high speed drivers/receiversde-
signedforuseinbus organized data transmission systems
interconnectedby terminated 120Ω impedance lines. The
external terminationis intendedtobea 180Ω resistor from
thebustothe +5V logic supply togetherwith a390Ω resistor
fromthebusto ground.Thebuscanbe terminated atoneor
both ends. Low buspin current allowsupto27 driver/
receiver pairsto utilizea common bus. Thebus loadingis
unchanged when VCC=0V. The receivers incorporate tight
thresholdsfor better busnoise immunity. One two-input NOR
gateis includedto disableall driversina package simulta-
neously.
Features4 separate driver/receiver pairsper package Guaranteed minimumbus noise immunityof 0.6V, 1.1V
typ Temperature insensitive receiver thresholds trackbus
logic levels30μA typicalbus terminal current with normal VCCor
with VCC=0V Open collector driver output allows wire-OR connection High speed Series74TTL compatible driverand disable inputsand
receiver outputs
Connection Diagram
Dual-In-Line PackageDS005806-1
Top View
Order Number DS8641N
SeeNS Package Number N16AJanuary 1996
DS8641
Quad
Unified
Bus
ransceiver©1999 National Semiconductor Corporation DS005806
