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DS8113-JNG+T&R
Smart Card Interface
General DescriptionThe DS8113 smart card interface is a low-cost, analog
front-end for a smart card reader, designed for all ISO
7816, EMV™, and GSM11-11 applications. The DS8113
supports 5V, 3V, and 1.8V smart cards. The DS8113
provides options for low active- and stop-mode power
consumption, with as little as 10nA stop-mode current.
The DS8113 is designed to interface between a system
microcontroller and the smart card interface, providing
all power supply, ESD protection, and level shifting
required for IC card applications.
An EMV Level 1 library (written for the MAXQ2000
microcontroller) and hardware reference design is
available. Contact Maxim technical support at
https://support.maxim-ic.com/microregarding
requirements for other microcontroller platforms. An
evaluation kit, DS8113-KIT, is available to aid in proto-
typing and evaluation.
ApplicationsConsumer Set-Top Boxes
Access Control
Banking Applications
POS Terminals
Debit/Credit Payment Terminals
PIN Pads
Automated Teller Machines
Telecommunications
Pay/Premium Television
FeaturesAnalog Interface and Level Shifting for IC Card
Communication8kV (min) ESD (IEC) Protection on Card InterfaceUltra-Low Stop-Mode Current, Less Than 10nA
TypicalInternal IC Card Supply-Voltage Generation:
5.0V ±5%, 80mA (max)
3.0V ±8%, 65mA (max)
1.8V ±10%, 30mA (max)Automatic Card Activation and Deactivation
Controlled by Dedicated Internal SequencerI/O Lines from Host Directly Level Shifted for
Smart Card CommunicationFlexible Card Clock Generation, Supporting
External Crystal Frequency Divided by 1, 2, 4, or 8High-Current, Short-Circuit and High-Temperature
ProtectionLow Active-Mode Current
DS8113
Smart Card Interface
Ordering Information19-5216; Rev 3; 4/10
Note:Contact the factory for availability of other variants and
package options.
+Denotes a lead(Pb)-free/RoHS-compliant package.
EMV is a trademark owned by EMVCo LLC.
Note:Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be
PARTTEMP RANGEPIN-PACKAGEDS8113-RNG+ -40°C to +85°C 28 SO
DS8113-JNG+ -40°C to +85°C 28 TSSOP
Selector Guide appears at end of data sheet.PGND
AUX2IN
AUX1IN
I/OIN
XTAL2
TOP VIEW
DS8113
XTAL1
OFF
GNDVDDRSTINCMDVCC1_8VVCCRSTCLK
5V/3V
CLKDIV2
CLKDIV1
CP1
VDDA
VUP
PRES
PRES
I/O
AUX2
AUX1CGND
CP2
SO/TSSOP
Pin Configuration
EVALUATION KIT
AVAILABLE
DS8113
Smart Card Interface
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS(VDD= +3.3V, VDDA= +5.0V, TA= +25°C, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VDD Relative to GND...............-0.5V to +6.5V
Voltage Range on VDDA Relative to PGND..........-0.5V to +6.5V
Voltage Range on CP1, CP2, and VUP
Relative to PGND...............................................-0.5V to +7.5V
Voltage Range on All Other Pins
Relative to GND......................................-0.5V to (VDD+ 0.5V)
Maximum Junction Temperature.....................................+125°C
Maximum Power Dissipation (TA= -25°C to +85°C).......700mW
Storage Temperature Range.............................-55°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLY Digital Supply Voltage VDD 2.7 6.0 V
Card Voltage-Generator Supply Voltage VDDA VDDA > VDD 5.0 6.0 V
VTH2 Threshold voltage (falling) 2.35 2.45 2.60 V Reset Voltage Thresholds VHYS2 Hysteresis 50.0 100 150 mV
CURRENT CONSUMPTION Active VDD Current 5V Cards
(Including 80mA Draw from 5V Card) IDD_50VICC = 80mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V 80.75 85.00 mA
Active VDD Current 5V Cards
(Current Consumed by DS8113 Only) IDD_ICICC = 80mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5.00 mA
Active VDD Current 3V Cards
(Including 65mA Draw from 3V Card) IDD_30VICC = 65mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V 65.75 70.00 mA
Active VDD Current 3V Cards
(Current Consumed by DS8113 Only) IDD_ICICC = 65mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5.00 mA
Active VDD Current 1.8V Cards
(Including 30mA Draw from 1.8V Card) IDD_18VICC = 30mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V 30.75 35.00 mA
Active VDD Current 1.8V Cards
(Current Consumed by DS8113 Only) IDD_ICICC = 30mA, fXTAL = 20MHz,
fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5.00 mA
Inactive-Mode Current IDDCard inactive, active-high PRES,
DS8113 not in stop mode 50.0 200 μA
Stop-Mode Current IDD_STOP
DS8113 in ultra-low-power stop
mode (CMDVCC, 5V/3V, and 1_8V
set to logic 1) (Note 3)
0.01 2.00 μA
DS8113
Smart Card Interface
RECOMMENDED DC OPERATING CONDITIONS (continued)(VDD= +3.3V, VDDA= +5.0V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CLOCK SOURCE Crystal Frequency fXTAL External crystal 0 20 MHz
fXTAL1 0 20 MHz
VIL_XTAL1 Low-level input on XTAL1 -0.3 0.3 x
VDDXTAL1 Operating Conditions
VIH_XTAL1 High-level input on XTAL1 0.7 x
VDD
VDD +
0.3
External Capacitance for Crystal CXTAL1,
CXTAL2 15 pF
Internal Oscillator fINT 2.7 MHz
SHUTDOWN TEMPERATURE Shutdown Temperature TSD +150 °C
RST PIN Output Low Voltage VOL_RST1 IOL_RST = 1mA 0 0.3 V Card-Inactive Mode Output Current IOL_RST1 VO_LRST = 0V 0 -1 mA
Output Low Voltage VOL_RST2 IOL_RST = 200μA 0 0.3 V
Output High
Voltage VOH_RST2 IOH_RST = -200μA VCC -
0.5 VCC V
Rise Time tR_RST CL= 30pF 0.1 μs
Fall Time tF_RST CL= 30pF 0.1 μs
Shutdown Current
Threshold IRST(SD) -20 mA
Current Limitation IRST(LIMIT) -20 +20 mA
Card-Active Mode
RSTIN to RST Delay tD(RSTIN-RST) 2 μs
CLK PIN Output Low Voltage VOL_CLK1 IOLCLK = 1mA 0 0.3 V Card-Inactive Mode Output Current IOL_CLK1 VOLCLK = 0V 0 -1 mA
Output Low Voltage VOL_CLK2 IOLCLK = 200μA 0 0.3 V
Output High
Voltage VOH_CLK2 IOHCLK = -200μA VCC -
0.5 VCC V
Rise Time tR_CLK CL= 30pF (Note 4) 8 ns
Fall Time tF_CLK CL= 30pF (Note 4) 8 ns
Current Limitation ICLK(LIMIT) -70 +70 mA
Clock Frequency fCLK Operational 0 10 MHz
Duty Factor CL= 30pF 45 55 %
Card-Active Mode
Slew Rate SR CL= 30pF 0.2 V/ns
VCC PIN Output Low Voltage VCC1 ICC = 1mA 0 0.3 V Card-Inactive Mode Output Current ICC1 VCC = 0V 0 -1 mA
DS8113
Smart Card Interface
RECOMMENDED DC OPERATING CONDITIONS (continued)(VDD= +3.3V, VDDA= +5.0V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS65mA < ICC(5V) < 80mA 4.55 5.00 5.25
ICC(5V) < 65mA 4.75 5.00 5.25
ICC(3V) < 65mA 2.78 3.00 3.22
ICC(1.8V) < 30mA 1.65 1.80 1.95
5V card; current pulses of 40nC
with I < 200mA, t < 400ns,
f < 20MHz
4.6 5.4
3V card; current pulses of 24nC
with I < 200mA, t < 400ns,
f < 20MHz
2.75 3.25
Output Low Voltage VCC2
1.8V card; current pulses of 12nC
with I < 200mA, t < 400ns,
f < 20MHz
1.62 1.98
VCC(5V) = 0 to 5V -80
VCC(3V) = 0 to 3V -65 Output Current ICC2
VCC(1.8V) = 0 to 1.8V -30
mA
Shutdown Current
Threshold ICC(SD) 120 mA
Card-Active Mode
Slew Rate VCCSR Up/down; C < 300nF (Note 5) 0.05 0.16 0.25 V/μs
DATA LINES (I/O AND I/OIN) I/O I/OINFalling Edge Delay tD(IO-IOIN) 200 ns
Pullup Pulse Active Time tPU 100 ns
Maximum Frequency fIOMAX 1 MHz
Input Capacitance CI 10 pF
I/O, AUX1, AUX2 PINS Output Low VoltageVOL_IO1 IOL_IO = 1mA0 0.3 V
Output Current IOL_IO1 VOL_IO = 0V 0 -1 mA Card-Inactive Mode
Internal Pullup
Resistor RPU_IO To VCC 9 11 19 k
Output Low VoltageVOL_IO2 IOL_IO = 1mA 0 0.3V
IOH_IO = < -20μA 0.8 x VCC VCCOutput High
Voltage VOH_IO2IOH_IO = < -40μA (3V/5V) 0.75 x VCC VCCV
Output Rise/Fall
Time tOT CL= 30pF 0.1 μs
Input Low Voltage VIL_IO -0.3 +0.8
Input High Voltage VIH_IO 1.5 VCCV
Input Low Current IIL_IO VIL_IO = 0V 600 μA
Input High Current IIH_IO VIH_IO = VCC 20 μA
Input Rise/Fall Time tIT 1.2 μs
Current Limitation IIO(LIMIT) CL= 30pF -15 +15 mA
Card-Active Mode
Current When
Pullup Active IPU CL= 80pF, VOH = 0.9 x VDD -1 mA
DS8113
Smart Card Interface
RECOMMENDED DC OPERATING CONDITIONS (continued)(VDD= +3.3V, VDDA= +5.0V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
I/OIN, AUX1IN, AUX2IN PINS Output Low Voltage VOL IOL = 1mA 0 0.3 V
No Load 0.9 x
VDD
VDD +
0.1 Output High Voltage VOH
IOH < -40μA 0.75 x
VDD
VDD +
0.1
Output Rise/Fall Time tOT CL= 30pF, 10% to 90% 0.1 μs
Input Low Voltage VIL -0.3 0.3 x
VDDV
Input High Voltage VIH0.7 x
VDD
VDD +
0.3 V
Input Low Current IIL_IO VIL = 0V 700 μA
Input High Current IIH_IO VIH = VDD 10 μA
Input Rise/Fall Time tIT VIL to VIH 1.2 μs
Integrated Pullup Resistor RPU Pullup to VDD 9 11 13 k
Current When Pullup Active IPU CL= 30pF, VOH = 0.9 x VDD -1 mA
CONTROL PINS (CLKDIV1, CLKDIV2, CMDVCC, RSTIN, 5V/3V, 1_8V)Input Low Voltage VIL -0.3 0.3 x
VDDV
Input High Voltage VIH0.7 x
VDD
VDD +
0.3 V
Input Low Current IIL_IO 0 < VIL < VDD 5 μA
Input High Current IIH_IO 0 < VIH < VDD 5 μA
INTERRUPT OUTPUT PIN (OFF) Output Low Voltage VOL IOL = 2mA 0 0.3 V
Output High Voltage VOH IOH = -15μA 0.75 x
VDD V
Integrated Pullup Resistor RPU Pullup to VDD 16 20 24 k
PRES, PRES PINS Input Low Voltage VIL_PRES 0.3 x
VDDV
Input High Voltage VIH_PRES 0.7 x
VDD V
Input Low Current IIL_PRES VIL_PRES = 0V 40 μA
Input High Current IIH_PRES VIH_PRES = VDD 40 μA
DS8113
Smart Card Interface
RECOMMENDED DC OPERATING CONDITIONS (continued)(VDD= +3.3V, VDDA= +5.0V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING Activation Time tACT 50 220 μs
Deactivation Time tDEACT 50 80 100 μs
Window Start t3 50 130 CLK to Card Start
Time Window End t5 140 220 μs
PRES/PRES Debounce Time tDEBOUNCE 5 8 11 ms
Note 1:Operation guaranteed at -40°C and +85°C but not tested.
Note 2:IDD_IC measures the amount of current used by the DS8113 to provide the smart card current minus the load.
Note 3:Stop mode is enabled by setting CMDVCC, 5V/3V, and 1_8V to a logic-high.
Note 4:Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maximum
rise and fall time is 10ns.
Note 5:Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum
slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.
DS8113
Smart Card Interface
Pin Description
PINNAMEFUNCTION1, 2 CLKDIV1,
CLKDIV2
Clock Divider. Determines the divided-down input clock frequency (presented at XTAL1 or from a
crystal at XTAL1 and XTAL2) on the CLK output pin. Dividers of 1, 2, 4, and 8 are available.
3 5V/3V
5V/3V Selection Pin. Allows selection of 5V or 3V for communication with an IC card. Logic-high
selects 5V operation; logic-low selects 3V operation. The 1_8V pin overrides the setting on this pin if
active. See Table 3 for a complete description of choosing card voltages.
4 PGND Analog Ground
5, 7 CP2, CP1 Step-Up Converter Contact. Unused for the DS8113. VDDA Charge Pump Supply. Must be equal to or higher than VDD. For the DS8113 this must be at least 5.0V. VUP Charge Pump Output. Unused for the DS8113. PRESCard Presence Indicator. Active-low card presence inputs. When the presence indicator becomes
active, a debounce timeout begins. After 8ms (typ) the OFF signal becomes active.
10 PRES Card Presence Indicator. Active-high card presence inputs. When the presence indicator becomes
active, a debounce timeout begins. After 8ms (typ) the OFF signal becomes active.
11 I/O Smart Card Data-Line Output. Card data communication line, contact C7.
12, 13 AUX2,
AUX1
Smart Card Auxiliary Line (C4, C8) Output. Data line connected to card reader contacts C4 (AUX1)
and C8 (AUX2).
14 CGND Smart Card Ground
15 CLK Smart Card Clock. Card clock, contact C3.
16 RST Smart Card Reset. Card reset output from contact C2.
17 VCC Smart Card Supply Voltage. Decouple to CGND (card ground) with 2 x 100nF or 100 + 220nF
capacitors (ESR < 100m).
18 1_8V 1.8V Operation Selection. Active-high selection for 1.8V smart card communication. An active-high
signal on this pin overrides any setting on the 5V/3V pin. CMDVCC Activation Sequence Initiate. Active-low input from host.
20 RSTIN Card Reset Input. Reset input from the host.
21 VDD Supply Voltage
22 GND Digital Ground OFF Status Output. Active-low interrupt output to the host. Use a 20k integrated pullup resistor to VDD.
24, 25 XTAL1,
XTAL2
Crystal/Clock Input. Connect an input from an external clock to XTAL1 or connect a crystal across
XTAL1 and XTAL2. For the low idle-mode current variant, an external clock must be driven on
XTAL1.
26 I/OIN I/O Input. Host-to-interface chip data I/O line.
27, 28 AUX1IN,
AUX2IN C4/C8 Input. Host-to-interface I/O line for auxiliary connections to C4 and C8.
DS8113
Detailed DescriptionThe DS8113 is an analog front-end for communicating
with 1.8V, 3V, and 5V smart cards. It is a dual input-
voltage device, requiring one supply to match that of a
host microcontroller and a separate +5V supply for
generating correct smart card supply voltages. The
DS8113 translates all communication lines to the cor-
rect voltage level and provides power for smart card
operation. It is a low-power device, consuming very lit-
tle current in active-mode operation (during a smart
card communication session), and is suitable for use in
battery-powered devices such as laptops and PDAs,
consuming only 10nA in stop mode. See Figure 1 for a
functional diagram.
Power SupplyThe DS8113 is a dual-supply device. The supply pins
for the device are VDD, GND, VDDA, and PGND. VDD
should be in the range of 2.7V to 6.0V, and is the sup-
ply for signals that interface with the host controller. It
should, therefore, be the same supply as used by the
host controller. All smart card contacts remain inactive
during power-on or power-off. The internal circuits are
kept in the reset state until VDDreaches VTH2+ VHYS2
and for the duration of the internal power-on reset
pulse, tW. A deactivation sequence is executed when
VDDfalls below VTH2.
An internal regulator generates the 1.8V, 3V, or 5V card
supply voltage (VCC). The regulator should be supplied
separately by VDDA and PGND. VDDA should be con-
nected to a minimum 5.0V supply in order to provide
the correct supply voltage for 5V smart cards.
Voltage SupervisorThe voltage supervisor monitors the VDDsupply. A
220µs reset pulse (tW) is used internally to keep the
device inactive during power-on or power-off of the
VDDsupply. See Figure 2.
The DS8113 card interface remains inactive no matter
the levels on the command lines until duration tWafter
VDDhas reached a level higher than VTH2+ VHYS2.
When VDDfalls below VTH2, the DS8113 executes a
card deactivation sequence if its card interface is
active.
Smart Card InterfaceTEMPERATURE
MONITOR
CARD VOLTAGE
GENERATOR
CLOCK
GENERATION
CONTROL
SEQUENCER
POWER-SUPPLY
SUPERVISOR
I/O TRANSCEIVER
VDD
GND
VDDA
PGND
CP1
CP2
VUP
VCC
XTAL1
XTAL2
CLKDIV1
CLKDIV2
1_8V
5V/3V
CMDVCC
RSTINCGND
RST
CLK
I/O
AUX1
AUX2
PRES
PRES
OFF
I/OIN
AUX1IN
AUX2IN
DS8113
Figure 1. Functional Diagram
VDD
ALARM
(INTERNAL SIGNAL)
POWER ONtW
POWER OFF
VTH2 + VHYS2
VTH2
SUPPLY DROPOUT
Figure 2. Voltage Supervisor Behavior
Clock CircuitryThe card clock signal (CLK) is derived from a clock sig-
nal input to XTAL1 or from a crystal operating at up to
20MHz connected between XTAL1 and XTAL2. The
output clock frequency of CLK is selectable through
inputs CLKDIV1 and CLKDIV2. The CLK signal fre-
quency can be fXTAL, fXTAL/2, fXTAL/4, or fXTAL/8. See
Table 1 for the frequency generated on the CLK signal
given the inputs to CLKDIV1 and CLKDIV2.
Note that CLKDIV1 and CLKDIV2 must not be changed
simultaneously; a delay of 10ns minimum between
changes is needed. The minimum duration of any state
of CLK is eight periods of XTAL1.
The frequency change is synchronous: during a transi-
tion of the clock divider, no pulse is shorter than 45% of
the smallest period, and the first and last clock pulses
about the instant of change have the correct width.
When changing the frequency dynamically, the change
is effective for only eight periods of XTAL1 after the
command.
The fXTALduty factor depends on the input signal on
XTAL1. To reach a 45% to 55% duty factor on CLK,
XTAL1 should have a 48% to 52% duty factor with tran-
sition times less than 5% of the period.
With a crystal, the duty factor on CLK can be 45% to
55% depending on the circuit layout and on the crystal
characteristics and frequency. In other cases, the duty
factor on CLK is guaranteed between 45% and 55% of
the clock period.
If the crystal oscillator is used or if the clock pulse on
XTAL1 is permanent, the clock pulse is applied to the
card as shown in the activation sequences in Figures 3
and 4. If the signal applied to XTAL1 is controlled by
the host microcontroller, the clock pulse is applied to
the card when it is sent by the system microcontroller
(after completion of the activation sequence).
I/O TransceiversThe three data lines I/O, AUX1, and AUX2 are identical.
This section describes the characteristics of I/O and
I/OIN but also applies to AUX1, AUX1IN, AUX2, and
AUX2IN.
I/O and I/OIN are pulled high with an 11kΩresistor (I/O
to VCC and I/OIN to VDD) in the inactive state. The first
side of the transceiver to receive a falling edge
becomes the master. When a falling edge is detected
(and the master is decided), the detection of falling
edges on the line of the other side is disabled; that side
then becomes a slave. After a time delay tD(EDGE), an n
transistor on the slave side is turned on, thus transmit-
ting the logic 0 present on the master side.
When the master side asserts a logic 1, a p transistor
on the slave side is activated during the time delay tPU
and then both sides return to their inactive (pulled up)
states. This active pullup provides fast low-to-high tran-
sitions. After the duration of tPU, the output voltage
depends only on the internal pullup resistor and the
load current. Current to and from the card I/O lines is
limited internally to 15mA. The maximum frequency on
these lines is 1MHz.
Inactive ModeThe DS8113 powers up with the card interface in the
inactive mode. Minimal circuitry is active while waiting
for the host to initiate a smart card session.All card contacts are inactive (approximately 200Ω
to GND).Pins I/OIN, AUX1IN, and AUX2IN are in the high-
impedance state (11kΩpullup resistor to VDD).Voltage generators are stopped.XTAL oscillator is running (if included in the device).Voltage supervisor is active.The internal oscillator is running at its low frequency.
Activation SequenceAfter power-on and the reset delay, the host microcon-
troller can monitor card presence with signals OFFand
CMDVCC, as shown in Table 2.
DS8113
Smart Card Interface
Table 1. Clock Frequency Selection
CLKDIV1CLKDIV2fCLK0 0 fXTAL/8
0 1 fXTAL/4
1 1 fXTAL/2
1 0 fXTAL
Table 2. Card Presence IndicationOFFCMDVCC
STATUSHigh High Card present.
Low High Card not present.
