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DS5002FP
Secure Microprocessor Chip
GENERAL DESCRIPTION The DS5002FP secure microprocessor chip is a secure version of the DS5001FP 128k soft microprocessor chip. In addition to the memory and
I/O enhancements of the DS5001FP, the secure microprocessor chip incorporates the most
sophisticated security features available in any processor. The security features of the DS5002FP
include an array of mechanisms that are designed to resist all levels of threat, including observation,
analysis, and physical attack. As a result, a massive effort is required to obtain any information about
memory contents. Furthermore, the soft nature of the DS5002FP allows frequent modification of the
secure information, thereby minimizing the value of any secure information obtained by such a massive
effort.
PIN CONFIGURATION
FEATURES 8051-Compatible Microprocessor for
Secure/Sensitive Applications Access 32kB, 64kB, or 128kB of NV SRAM for Program and/or Data Storage
In-System Programming Through On-Chip Serial Port
Can Modify Its Own Program or Data Memory in
the End System Firmware Security Features Memory Stored in Encrypted Form Encryption Using On-Chip 64-Bit Key
Automatic True Random Key Generator Self Destruct Input (SDI)
Optional Top Coating Prevents Microprobe
(DS5002FPM) Improved Security Over Previous Generations Protects Memory Contents from Piracy Crash-Proof Operation Maintains All Nonvolatile Resources for Over 10 Years in the Absence of Power
Power-Fail Reset
Early Warning Power-Fail Interrupt Watchdog Timer
ORDERING INFORMATION
Selector Guide appears at end of data sheet.
DS5002FP
Secure Microprocessor Chip
DS5002FP Secure Microprocessor Chip
ELECTRICAL SPECIFICATIONS The DS5002FP adheres to all AC and DC electrical specifications published for the DS5001FP. The absolute
maximum ratings and unique specifications for the DS5002FP are listed below.
ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.3V to (VCC + 0.5V)
Voltage Range on VCC Relative to Ground -0.3V to +6.0V
Operating Temperature Range -40�C to +85�C
Storage Temperature* -55�C to +125�C
Soldering Temperature See IPC/JEDEC J-STD-020A
This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect reliability.
*Storage temperature is defined as the temperature of the device when VCC = 0V and VLI = 0V. In this state the contents of SRAM are not
battery-backed and are undefined.
DC CHARACTERISTICS (VCC = 5V ±10%, TA = 0°C to +70°C.)
DS5002FP Secure Microprocessor Chip
DC CHARACTERISTICS (continued) (VCC = 5V ±10%, TA = 0°C to +70°C.)
AC CHARACTERISTICS (VCC = 0V to 5V, TA = 0°C to +70°C.)
DS5002FP Secure Microprocessor Chip
AC CHARACTERISTICSEXPANDED BUS MODE TIMING SPECIFICATIONS (VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 1 and Figure 2)
Figure 1. Expanded Data Memory Read Cycle
DS5002FP Secure Microprocessor Chip
Figure 2. Expanded Data Memory Write Cycle AC CHARACTERISTICSEXTERNAL CLOCK DRIVE (VCC = 5V ± 10%, TA = 0°C to +70°C.) (Figure 3)
Figure 3. External Clock Timing
DS5002FP Secure Microprocessor Chip
AC CHARACTERISTICSPOWER CYCLE TIME
(VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 4)
Figure 4. Power Cycle Timing
DS5002FP Secure Microprocessor Chip
AC CHARACTERISTICSSERIAL PORT TIMING, MODE 0
(VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 5)
Figure 5. Serial Port Timing, Mode 0
DS5002FP Secure Microprocessor Chip
AC CHARACTERISTICSBYTE-WIDE ADDRESS/DATA BUS TIMING
(VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 6)
Figure 6. Byte-Wide Bus Timing
DS5002FP Secure Microprocessor Chip
RPC AC CHARACTERISTICS, DBB READ
(VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 7)
RPC AC CHARACTERISTICS, DBB WRITE
(VCC = 5V ±10%, TA = 0°C to +70°C.) (Figure 7) AC CHARACTERISTICS, DMA
(VCC = 5V ±10%, TA = 0°C to +70°C.) AC CHARACTERISTICS, PROG
(VCC = 5V ±10%, TA = 0°C to +70°C.)
DS5002FP Secure Microprocessor Chip
Figure 7. RPC Timing Mode
All parameters apply to both commercial and industrial temperature operation unless otherwise noted.
Note 1: All voltages are referenced to ground.
Note 2: Maximum operating ICC is measured with all output pins disconnected; XTAL1 driven with tCLKR, tCLKF = 10 ns, VIL = 0.5V; XTAL2
disconnected; RST = PORT0 = VCC, MSEL = VSS.
Note 3: Idle mode IIDLE is measured with all output pins disconnected; XTAL1 driven with tCLKR,tCLKF = 10ns, VIL = 0.5V; XTAL2 disconnected;
PORT0 = VCC, RST = MSEL = VSS.
Note 4: Stop mode ISTOP is measured with all output pins disconnected; PORT0 = VCC; XTAL2 not connected; RST = MSEL = XTAL1 = VSS.
Note 5: Pin capacitance is measured with a test frequency: 1MHz, TA = +25°C.
Note 6: ICCO1 is the maximum average operating current that can be drawn from VCCO in normal operation.
Note 7: ILI is the current drawn from VLI input when VCC = 0V and VCCO is disconnected. Battery-backed mode is 2.5V � VBAT � 4.0; VCC � VBAT;
VSDI should be � VILS for IBAT max.
Note 8: VCCO2 is measured with VCC < VLI, and a maximum load of 10 µA on VCCO.
Note 9: Crystal startup time is the time required to get the mass of the crystal into vibrational motion from the time that power is first applied to
the circuit until the first clock pulse is produced by the on-chip oscillator. The user should check with the crystal vendor for a worst
case specification on this time.
Note 10: SDI is deglitched to prevent accidental destruction. The pulse must be longer than tSPR to pass the deglitcher, but SDI is not
guaranteed unless it is longer than tSPA.
Note 11: VIHS minimum is 2.0V or VCCO, whichever is lower.
DS5002FP Secure Microprocessor Chip
PIN DESCRIPTION
DS5002FP Secure Microprocessor Chip
DS5002FP Secure Microprocessor Chip
DETAILED DESCRIPTION
The DS5002FP implements a security system that is an improved version of its predecessor, the DS5000FP. Like
the DS5000FP, the DS5002FP loads and executes application software in encrypted form. Up to 128kB of standard SRAM can be accessed by its byte-wide bus. This RAM is converted by the DS5002FP into lithium-
backed nonvolatile storage for program and data. Data is maintained for over 10 years at room temperature with a very small lithium cell. As a result, the contents of the RAM and the execution of the software appear unintelligible
to the outside observer. The encryption algorithm uses an internally stored and protected key. Any attempt to discover the key value results in its erasure, rendering the encrypted contents of the RAM useless. The secure microprocessor chip offers a number of major enhancements to the software security implemented in
the previous generation DS5000FP. First, the DS5002FP provides a stronger software encryption algorithm that incorporates elements of DES encryption. Second, the encryption is based on a 64-bit key word, as compared to
the DS5000FPs 40-bit key. Third, the key can only be loaded from an on-chip true random-number generator. As a result, the true key value is never known by the user. Fourth, a self-destruct input (SDI) pin is provided to interface
to external tamper-detection circuitry. With or without the presence of VCC, activation of the SDI pin has the same effect as resetting the security lock: immediate erasure of the key word and the 48-byte Vector RAM area. Fifth, an
optional top-coating of the die prevents access of information using microprobing techniques. Finally, customer-specific versions of the DS5002FP are available that incorporate a one-of-a-kind encryption algorithm. When implemented as a part of a secure system design, a system based on the DS5002FP can typically provide a
level of security that requires more time and resources to defeat than it is worth to unauthorized individuals who have reason to try. For a user who wants a preconstructed module using the DS5002FP, RAM, lithium cell, and a
real-time clock, the DS2252T is available and described in a separate data sheet. BLOCK DIAGRAM
Figure 8 is a block diagram illustrating the internal architecture of the DS5002FP. The DS5002FP is a secure implementation of the DS5001FP 128k soft microprocessor chip. As a result, it operates in an identical fashion to
the DS5001FP, except where indicated. See the DS5001FP data sheet for operating details.
