DS4510U-10+-DS4510U-15+ Fast Delivery |IC PHOENIX CO.,LIMITED

DS4510U-10+ ,CPU Supervisor with Nonvolatile Memory and Programmable I/OApplicationsOrdering InformationRAM-Based FPGA Bank Switching for V TRIP PIN-CC PART TEMP RANGEMult ..
DS4510U-15 ,CPU Supervisor with Nonvolatile Memory and Programmable I/OELECTRICAL CHARACTERISTICS(V = 2.7V to 5.5V, T = -40°C to +85°C.)CC APARAMETER SYMBOL CONDITIONS MI ..
DS4510U-15+ ,CPU Supervisor with Nonvolatile Memory and Programmable I/OFeaturesThe DS4510 is a CPU supervisor with integrated 64-♦ Accurate 5%, 10%, or 15% 5V Power-Suppl ..
DS4510U-5 ,CPU Supervisor with Nonvolatile Memory and Programmable I/OFeaturesThe DS4510 is a CPU supervisor with integrated 64-♦ Accurate 5%, 10%, or 15% 5V Power-Suppl ..
DS4520 ,9-Bit I2C Nonvolatile I/O Expander Plus MemoryFeaturesThe DS4520 is a 9-bit nonvolatile (NV) I/O expander with♦ Programmable Replacement for Mech ..
DS4520E ,9-Bit I2C Nonvolatile I/O Expander Plus MemoryApplications♦ Wide Operating Voltage (2.7V to 5.5V)RAM-Based FPGA Bank Switching for ♦ Operating Te ..
EC2-24 ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-24NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NJ ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5TNU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-5ND ,High Insulation, High breakdown voltage, compact and lightweight, Surface mounting type

DS4510U-10+-DS4510U-15+
CPU Supervisor with Nonvolatile Memory and Programmable I/O
General Description
The DS4510 is a CPU supervisor with integrated 64-
byte EEPROM memory and four programmable, non-
volatile (NV) I/O pins. It is configured with an
industry-standard I2C interface using either fast-mode
(400kbps) or standard-mode (100kbps) communica-
tion. The I/O pins can be used as general-purpose I2C-
to-parallel I/O expander with unlimited read/write
capability. EEPROM registers allow the power-on value
of the I/O pins to be adjusted to keep track of the sys-
tem’s state through power cycles, and the CPU supervi-
sor’s timer can be adjusted between 125ms and
1000ms to meet most any application need.
Applications
RAM-Based FPGA Bank Switching for
Multiple Profiles
Industrial Controls
Cellular Telephones
PC Peripherals
PDAs
FeaturesAccurate 5%, 10%, or 15% 5V Power-Supply
MonitoringProgrammable Reset Timer Maintains Reset After
VCCReturns to an In-Tolerance ConditionFour Programmable, NV, Digital I/O Pins with
Selectable Internal Pullup Resistor64 Bytes of User EEPROMReduces Need for Discrete ComponentsI2C-Compatible Serial Interface10-Pin µSOPPackage
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
I/O0
I/O1
I/O2VCC
SCL
SDA
TOP VIEW
I/O3GND
μSOP
DS4510
RST
Pin Configuration
Ordering Information
DS4510
SDA
SCL
I/O0
I/O1
I/O2
I/O3
GND
VCCVCC
FPGA
2.7V TO 5.5V
GND
RESET
CONFIG0
CONFIG1
CONFIG2
CONFIG3
FROM
SYSTEM
CONTROLLER
4.7kΩ4.7kΩ
4.7kΩ
RST
Typical Operating Circuit
Rev 2; 8/04
PARTVCC TRIP
POINTTEMP RANGEPIN-
PACKAGE
DS4510U-55%-40°C to +85°C10 µSOP
DS4510U-1010%-40°C to +85°C10 µSOP
DS4510U-1515%-40°C to +85°C10 µSOP
DS4510U-5/T&R5%-40°C to +85°C10 µSOP
DS4510U-10/T&R10%-40°C to +85°C10 µSOP
DS4510U-15/T&R15%-40°C to +85°C10 µSOP
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +85°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCC, SDA, and SCL
Pins Relative to Ground.....................................-0.5V to +6.0V
Voltage Range on A0, I/O0, I/O1, I/O2, I/O3Relative
to Ground..............-0.5V to VCC+ 0.5V, not to exceed +6.0V.
Operating Temperature Range...........................-40°C to +85°C
EEPROM Programming Temperature.....................0°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature.......................................See IPC/JEDEC
J-STD-020A Specification
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVCC(Notes 1)2.75.5V
Input Logic 1VIH(Note 2)0.7 x VCCVCC + 0.3V
Input Logic 0VIL-0.3+0.3 x VCCV
DC ELECTRICAL CHARACTERISTICS
(VCC= 2.7V to 5.5V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DS4510U-54.54.6254.75
DS4510U-104.254.3754.49VCC Trip PointVCCTP
DS4510U-154.04.1254.24
Standby CurrentISTBYVCC = 5.0V (Note 3)5075µA
Input LeakageIL-1.0+1.0µA
3mA sink current0.4SDA Low-Level Output VoltageVOL6mA sink current0.6V
I/OX Low-Level Output VoltageVOLIOX4mA sink current0.4V
RST Pin Low-Level OutputVOLRST10mA sink current (Note 4)0.4V
I/OX Pullup ResistorsRP4.05.06.5kΩ
I/O CapacitanceCI/O(Note 5)10pF
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
CPU SUPERVISOR AC ELECTRICAL CHARACTERISTICS (See Figure1)
(VCC= 2.7V to 5.5V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TD1= 0, TD0 = 0112125138
TD1= 0, TD0 = 1225250275
TD1= 1, TD0 = 0450500550RST Active TimetRST
TD1= 1, TD0 = 190010001100
TD1= 0, TD0 = 0112125138
TD1= 0, TD0 = 1225250275
TD1= 1, TD0 = 0450500550VCC Detect to RSTtRPU
TD1= 1, TD0 = 190010001100
VCC Fail to RSTtRPD410µs
AC ELECTRICAL CHARACTERISTICS (See Figure5)
(VCC= 2.7V to 5.5V, TA= -40°C to +85°C, timing referenced to VIL(MAX) andVIH(MIN).)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SCL Clock FrequencyfSCL(Note 6)0400kHz
Bus Free Time Between Stop and
Start ConditionstBUF1.3µs
Hold Time (Repeated) Start
ConditiontHD:STA0.6µs
Low Period of SCLtLOW1.3µs
High Period of SCLtHIGH0.6µs
Data Hold TimetHD:DAT00.9µs
Data Setup TimetSU:DAT100ns
Start Setup timetSU:STA0.6µs
SDA and SCL Rise TimetR(Note 7)20 + 0.1CB300ns
SDA and SCL Fall TimetF(Note 7)20 + 0.1CB300ns
Stop Setup TimetSU:STO0.6µs
SDA and SCL Capacitive
LoadingCB(Note 7)400pF
EEPROM Write TimetW(Note 7)1020ms
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
Note 1:All voltages referenced to ground.
Note 2:The DS4510 does not obstruct the SDA and SCL lines if VCCis switched off, as long as the voltages applied to these
inputs do not violate their min and max input voltage levels.
Note 3:ISTBY specified with VCCequal to 5.0V, and control port-logic pins are driven to ground or VCCfor the corresponding
inactive state (SDA = SCL = VCC), does not include pullup resistor current.
Note 4:See Typical Operating Characteristicsfor the RSToutput voltage vs. supply voltage.
Note 5:This parameter is guaranteed by design.
Note 6:I2C interface timing shown for is for fast-mode (400kHz) operation. This device is also backward compatible with I2C
standard-mode timing.
Note 7:CB—total capacitance of one bus line in picofarads.
Note 8:EEPROM write time applies to all the EEPROM memory and SEEPROM memory when SEE=0. The EEPROM write time
begins at the occurrence of a stop condition.
NONVOLATILE MEMORY CHARACTERISTICS
(VCC= 2.7Vto 5.5V, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Writes+70°C (Note 5)50,000
Typical Operating Characteristics
(VCC= +5.0V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
DS4510 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
VCC (10%)
TRIP POINT
SDA = SCL = VCC
I/O CONTROL BITS = 0
I/O PULLUPS DISABLED
SUPPLY CURRENT vs. TEMPERATURE
DS4510 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (40200-20
SDA = SCL = VCC
SUPPLY CURRENT vs. SCL FREQUENCY
DS4510 toc03
SCL FREQUENCY (kHz)
SUPPLY CURRENT (
SDA = VCC
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
Typical Operating Characteristics (continued)
(VCC= +5.0V, TA = +25°C, unless otherwise noted.)
VCC TRIP POINT vs. TEMPERATURE
DS4510 toc04
TEMPERATURE (°C)
TRIP POINT (V)40200-20
RST OUTPUT VOLTAGE vs. SUPPLY VOLTAGE
DS4510 toc05
SUPPLY VOLTAGE (V)
RESET TRIP VOLTAGE (V)
5.6kΩ PULLUP
RESISTOR ON RST
SDA = SCL = VCC
I/O PULLUP RESISTANCE vs. TEMPERATURE
DS4510 toc06
TEMPERATURE (°C)
I/O PULLUP RESISTANCE (k40200-20
Pin Description
PINNAMEFUNCTION
1A0I2C Address Input. This input pin determines the chip address of the device. A0 = 0 sets the slave
address to 1010000b, A0 = 1 sets the slave address to 1010001b.SDASerial Data Input/Output. Bidirectional I2C data pin.SCLSerial Clock Input. I2C clock input.
4VCCPower InputGNDGroundI/O3Input/Output 3. I2C accessible bidirectional I/O pin.I/O2Input/Output 2. I2C accessible bidirectional I/O pin.I/O1Input/Output 1. I2C accessible bidirectional I/O pin.I/O0Input/Output 0. I2C accessible bidirectional I/O pin.RSTActive-Low Reset Output. Open-drain CPU supervisor reset output.
DS4510
CPU Supervisor with Nonvolatile Memory and
Programmable I/O
Detailed Description
The DS4510 contains a CPU supervisor, four program-
mable I/O pins, and a 64-byte EEPROM memory. All
functions are configurable or controllable through an
industry-standard I2C-compatible bus. DS4510 NV reg-
isters that are likely to require frequent modification are
implemented using SRAM-shadowed EEPROM (SEEP-
ROM) memory. This memory is configurable to act as
volatile SRAM or NV EEPROM by adjusting the SEEbit
in the Config register. Configuring the SEEPROM as
SRAM eliminates the EEPROM write time and allows
infinite write cycles to these registers. Configuring the
registers as EEPROM allows the application to change
the power-on values that are recalled during power-up.
Programmable CPU Supervisor
The timeout period is adjusted by writing the reset
delay register (SEEPROM). The delay for each setting
is shown in the CPU Supervisor AC Electrical
Characteristics. If the SEEbit is set, changes are writ-
ten to SRAM. On power-up the last value written to the
EEPROM is recalled. The I2C bus is also used to acti-
vate the RSTby setting the SWRST bit in the Config
register. This bit automatically returns to zero after the
timeout period. The Config register also contains theready, trip point, and reset status bits. The readybit
determines if the power-on reset level of the DS4510 is
surpassed by VCC. The trip point bit determines if VCC
is above VCCTP, and the reset status bit is set if RSTis
in its active state.
Note: The RSTpin is an open-drain output, therefore an
external pullup resistor must be used to realize high
logic levels.
Programmable NV Digital I/O Pins
Each programmable I/OXpin contains an input, open-
collector output, and a selectable internal pullup resis-
tor. The DS4510 stores changes to the I/OXpin in
SEEPROM memory. Using the SEEPROM as SRAM is
conducive to applications such as I/O expansion that
generally require fast access times and frequent modi-
fication of the I/OXpin. Configuring the SEEPROM to
behave as EEPROM allows the modification of the
power-on state of the I/OXpin. During power-up the
I/OXpins are high impedance until VCCexceeds 2.0V
(typically), which is when the last value programmed is
recalled from EEPROM. On power-down, the I/OXstate
is maintained until VCCdrops below 1.9V (typically).
The internal pullups for each I/OXpin are controlled by
the pullup-enable register (F0h). Similarly, the individual
I/OXcontrol registers (F4h to F7h) adjust the pulldown
INTERNAL
VOLTAGE
REFERENCE
VCC
VCC
VCC
VCC
2-WIRE
INTERFACE
EEPROM
64 BYTES
USER
MEMORY
PROGRAMMABLE
RESET
TIMER
SCL
SDA
GND
4 NV
I/O PINS
4 BIDIRECTIONAL
NONVOLATILE I/O LATCHES
PULLUP ENABLE (F0h)
I/OX CONTROL (F4h-F7h)
I/O STATUS (F8h)
RST
DS4510
Functional Diagram

Partno	Mfg	Dc	Qty	Available	Descript
DS4510U-10+ \|DS4510U10+	N/A	N/a	4000	avai	CPU Supervisor with Nonvolatile Memory and Programmable I/O
DS4510U-15+ \|DS4510U15+	MAXIM	N/a	1500	avai	CPU Supervisor with Nonvolatile Memory and Programmable I/O