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DS3508E+-DS3508E+T&R
I²C, 8-Channel Gamma Buffer with EEPROM
General DescriptionThe DS3508 is a programmable 8-channel gamma volt-
age generator with one byte of on-chip EEPROM and
one byte of SRAM memory per channel. Each channel
is composed of an independent 8-bit DAC with an asso-
ciated EEPROM/SRAM pair. At power-up, nonvolatile
(NV) EEPROM gamma data is loaded into its corre-
sponding SRAM register that drives the associated 8-bit
DAC. An on-chip control register allows selectable con-
trol of writing to SRAM/EEPROM or SRAM only.
The DS3508 is designed for low-power operation and
draws less than 2mA (typ) from the VDDsupply.
Programming occurs through an I2C-compatible serial
interface with support for speeds up to 400kHz.
ApplicationsTFT-LCD Gamma Buffer
Industrial Controls
Features8-Bit Gamma DACs, 8 Channels1 Byte EEPROM and 1 Byte SRAM per ChannelUltra-Low Power (2mA IDD, typ)400kbps I2C Interface9.0V to 15.5V Analog Supply2.7V to 5.5V Digital Supply20-Pin TSSOP PackageAddress Pin Allows Two DS3508s to Reside on
the Same I2C Bus
DS35082C, 8-Channel Gamma Buffer with EEPROM
Ordering InformationRev 1; 3/08
+Denotes a lead-free package.
T&R = Tape and reel.
PARTTEMP RANGEPIN-PACKAGEDS3508E+ -45°C to +95°C 20 TSSOP
DS3508E+T&R -45°C to +95°C 20 TSSOP
TOP VIEW
DS35084GM3A03GM2GND2GM1SDA1VCCSCL7GM6VLM6GM5VHM8GM7VLL9GM8VDD10N.C.N.C.5GM4VHH
TSSOP
Pin ConfigurationDS3508
VCC
SDA
SCL
GND
GM1
GM2
GM3
GM4
GM5
GM6
GM7
GM8VLLVLM
VDD
15.0V
VHM
8.0V
VHH
14.8V
7.0V0.2V
5.0V
I2C
MASTER
SOURCE DRIVER
LIQUID-CRYSTAL
DISPLAY
Typical Operating Circuit
DS35082C, 8-Channel Gamma Buffer with EEPROM
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS(TA= -45°C to +95°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VDDand
VHH Relative to GND..........................................-0.5V to +16V
Voltage Range on VHM, VLM, and
VLL Relative to GND............................................-0.5V to +12V
Voltage Range on VCC, SDA, SCL, and
A0 Relative to GND............................................-0.5V to +6.0V
Junction Temperature......................................................+125°C
Operating Temperature Range...........................-45°C to +95°C
Programming Temperature Range.........................0°C to +70°C
Storage Temperature.........................................-55°C to +125°C
Soldering Temperature..............................................Refer to the
IPC/JEDEC J-STD-020 Specification.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSAnalog Supply Voltage VDD (Note 1) +9.0 +15.5 V
VHH, VHM Applies to GM1–GM4 VDD/2 - 1 VDD - 0.2 V
VLM, VLL Applies to GM5–GM8 0.2 VDD/2 + 1 V
VHH–VHM and VLM–VLL VREF 3.0 V
Digital Voltage Supply VCC (Note 1) 2.7 5.5 V
Input Logic 0 (A0, SDA, SCL) VIL 0.3 x VCC V
Input Logic 1 (A0, SDA, SCL) VIH 0.7 x VCC V
INPUT ELECTRICAL CHARACTERISTICS(VCC= +2.7V to +5.5V, TA= -45°C to +95°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSAnalog Supply Current IDD VDD = 15.5V (Note 2) 2 4mA
Digital Supply Current, NV Read
or Write ICC fSCL = 400kHz 0.2 1.0mA
Digital Supply Standby Current ISTBY VCC = 5.5V (Note 3) 2 10 μA
Input Leakage
(SDA, SCL, A0) IIL VCC = 5.5V -1 +1 μA
Input Resistance at VHH, VHM,
VLM, VLL RIN 1 M
DS35082C, 8-Channel Gamma Buffer with EEPROM
OUTPUT ELECTRICAL CHARACTERISTICS(VCC= +2.7V to +5.5V; VDD= 15.5V, TA= -45°C to +95°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSGamma DAC Resolution 8 Bits
Integral Nonlinearity Error TA = +25°C (Note 4) -1.25 +1.25 LSB
Differential Nonlinearity Error TA = +25°C (Note 5) -0.5 +0.5 LSB
Output Voltage Range:
GM1–GM4 VHM VHH V
Output Voltage Range:
GM5–GM8 VLL VLM V
ROUT (GM1–GM8) ROUT (Notes 6, 7) 20 k
Amplifier Offset TA = +25°C (Note 8) -35 +35 mV
I2C ELECTRICAL CHARACTERISTICS(VCC= +2.7V to +5.5V, TA= -45°C to +95°C, timing referenced to VIL(MAX)and VIH(MIN).) (Figure 4)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS SCL Clock Frequency fSCL (Note 9) 0 400 kHz
Low Period of SCL tLOW Measured at VIL 1.3 μs
High Period of SCL tHIGH Measured at VIH 0.6 μs
Bus Free Time Between STOP
and START Conditions tBUF 1.3 μs
START Setup Time tSU:STASCL rising through VIH to SDA falling
through VIH0.6 μs
Hold Time (Repeated) START
Condition tHD:STASDA falling through VIL to SCL falling
through VIH0.6 μs
Data Hold Time tHD:DAT 0 0.9 μs
Data Setup Time tSU:DAT 100 ns
A0 Setup Time tSU:A Before START 0.6 μs
A0 Hold Time tHD:A After STOP 0.6 μs
SDA and SCL Rise Time tR (Note 10) 20 + (0.1 x CB) 300 ns
SDA and SCL Fall Time tF (Note 10) 20 + (0.1 x CB) 300 ns
STOP Setup Time tSU:STO 0.6 μs
SDA and SCL Capacitive
Loading CB (Note 10) 400 pF
EEPROM Write Time tW (Note 11) 20 ms
SCL Falling Edge to SDA Output
Data Valid tAASCL falling through VIL to SDA exit
0.3–0.7 x VCC window 900 ns
Output Data Hold tDHSCL falling through VIL until SDA in
0.3–0.7 x VCC window 0 ns
DS35082C, 8-Channel Gamma Buffer with EEPROM2C ELECTRICAL CHARACTERISTICS (continued)(VCC= +2.7V to +5.5V, TA= -45°C to +95°C, timing referenced to VIL(MAX)and VIH(MIN).) (Figure 4)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS 4mA sink current 0.4 SDA Output Low Voltage VOL6mA sink current 0.6 V
Input Capacitance on
A0, SDA, or SCL CI 5 10 pF
NONVOLATILE MEMORY CHARACTERISTICS(VCC= +2.7V to +5.5V)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSEEPROM Write Cycles TA = +70°C 50,000 Writes
Note 1:All voltages referenced to ground.
Note 2:Analog supply current specified with no load on GMx outputs.
Note 3:ISTBY specified for the inactive state measured with SDA = SCL = VCC.
Note 4:INL = [V(GMx)i- (V(GMx)0]/LSB(ideal) - i, for i = 0 to 254.
Note 5:DNL = [V(GMx)i+1- (V(GMx)i]/LSB(ideal) - 1, for i = 0 to 255.
Note 6:DAC code = 80h.
Note 7:Outputs unloaded.
Note 8:VHH = 12.0V, VHM = 8.75V, VLM = 6.75V, VLL = 0.5V.
Note 9:Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C standard mode.
Note 10:CB—Total capacitance of one bus line in picofarads.
Note 11:EEPROM write begins after a STOP condition occurs.
DIGITAL SUPPLY STANDBY CURRENT
vs. DIGITAL SUPPLY VOLTAGEDS3508 toc01
VCC (V)
ICC STBY
CURRENT (
SDA = SCL = VCC
DIGITAL SUPPLY STANDBY CURRENT
vs. TEMPERATUREDS3508 toc02
TEMPERATURE (°C)
ICC STBY
CURRENT (551535-5-25
VCC = 5.5V
SDA = SCL = VCC
ANALOG SUPPLY CURRENT
vs. ANALOG SUPPLY VOLTAGEDS3508 toc03
VDD (V)
IDD
CURRENT (mA)1210
Typical Operating Characteristics
(VDD= 15.0V, VCC= 5.0V, TA = +25°C, unless otherwise noted.)
DS35082C, 8-Channel Gamma Buffer with EEPROM
ANALOG SUPPLY CURRENT
vs. TEMPERATUREDS3508 toc04
TEMPERATURE (°C)
IDD
CURRENT (mA)55-25-51535
GAMMA OUTPUT vs. SETTING
DS3508 toc05
GAMMA SETTING (DEC)
GM OUTPUT (V)
GM1–GM4
GM5–GM8
VDD = 15.0V
VHH = 14.8V
VHM = 8.0V
VLM = 7.0V
VLL = 0.2V
GAMMA OFFSET vs. TEMPERATUREDS3508 toc06
TEMPERATURE (°C)
GM OFFSET (mV)551535-5-25
GM1 = VHH = 14.5V
GM1 = VHH = 12.0V
GM8 = VLM = 8.5V
GM8 = VLL = 0.5V
GM1 = VHM = 6.5V
GM1 DNLDS3508 toc07
GAMMA SETTING (DEC)
GM1 DNL (LSB)
VDD = 15.0V
VHH = 14.8V
VHM = 8.0V
GM1 INLDS3508 toc08
GAMMA SETTING (DEC)
GM1 INL (LSB)
VDD = 15.0V
VHH = 14.8V
VHM = 8.0V
GM8 DNLDS3508 toc09
GAMMA SETTING (DEC)
GM8 DNL (LSB)
VDD = 15.0V
VLM = 7.0V
VLL = 0.2V
GM8 INLDS3508 toc10
GAMMA SETTING (DEC)
GM8 INL (LSB)
VDD = 15.0V
VLM = 7.0V
VHM = 0.2V
Typical Operating Characteristics (continued)(VDD= 15.0V, VCC= 5.0V, TA = +25°C, unless otherwise noted.)
DS35082C, 8-Channel Gamma Buffer with EEPROM
Functional DiagramDS3508
EEPROM 1
SRAM 1GM18-BIT
DAC
EEPROM 2
SRAM 2GM28-BIT
DAC
EEPROM 3
SRAM 3GM38-BIT
DAC
EEPROM 4
I2C
INTERFACE
CONTROL
LOGIC
CONTROL
REGISTERS
SRAM 4GM48-BIT
DAC
VHH
SDA
SCL
VDD
VHM
VLL
VLM
VDD
GND
VCC
VCC
EEPROM 5
SRAM 5GM58-BIT
DAC
EEPROM 6
SRAM 6GM68-BIT
DAC
EEPROM 7
SRAM 7GM78-BIT
DAC
EEPROM 8
SRAM 8GM88-BIT
DAC
DS35082C, 8-Channel Gamma Buffer with EEPROM
Pin Description
PINNAMETYPEFUNCTIONSCL Input Serial Clock Input. I2C clock input.
2 SDA Input/
Output
Serial Data Input/Output (Open Drain). I2C bidirectional data pin that requires a pullup
resistor to realize high logic levels.
3 GND Ground Ground A0 Input Address Input. Determines I2C slave address.
5 VHH Reference
Input High-Voltage DAC, Upper Reference
6 VHM Reference
Input High-Voltage DAC, Lower Reference
7 VLM Reference
Input Low-Voltage DAC, Upper Reference
8 VLL Reference
Input Low-Voltage DAC, Lower Reference
9 VDD Power Analog Supply
10, 11 N.C. — No Connection
12 GM8
13 GM7
14 GM6
15 GM5
Output Gamma Analog Outputs 5–8. These pins are the low-voltage gamma outputs
referenced to VLL and VLM.
16 GM4
17 GM3
18 GM2
19 GM1
Output Gamma Analog Outputs 1–4. These pins are the high-voltage gamma outputs
referenced to VHH and VHM.
20 VCC Power Digital Supply
Detailed DescriptionThe DS3508 provides eight independent DACs that
allow precise and repeatable setting of gamma curves.
The DS3508 provides four high-voltage DACs
(GM1–GM4) that operate between VHH and VHM and
four low-voltage DACs (GM5–GM8) that operate
between VLM and VLL. Each of the DACs provides 8
bits of resolution.
The DS3508 DAC output voltages are independently
controlled by the data stored in that channel’s SRAM
register. The MODE bit in the volatile control register
(CR bit 7) determines how I2C data is written to the
SRAM and EEPROM gamma data registers. Reading
and writing to the SRAM/EEPROM gamma data regis-
ters is based on the state of the MODE bit as follows:
MODE = 0:I2C writes to memory addresses
00h–07h write to both SRAM 1–8 and
EEPROM 1–8.2C reads from addresses 00h–07h
read from SRAM 1–8.
MODE = 1: I2C writes to addresses 00h–07h write
to SRAM 1–8.2C reads from addresses 00h–07h
read from SRAM 1–8.
Regardless of the MODE bit setting, all I2C reads of
address 00–07h return the contents of the SRAM regis-
ters. Setting MODE = 1 allows for quick writing of SRAM
without the added delay of writing to the associated
EEPROM register. The data that is stored in EEPROM and
SRAM remains unchanged if the MODE bit is toggled.
