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DS32B35-33#-DS32B35-33IND#-DS32C35-33#-DS32C35-33IND#
Accurate I²C RTC with Integrated TCXO/Crystal/FRAM
General DescriptionThe DS32B35/DS32C35 accurate real-time clocks
(RTC) are clock/calendars that include an integrated
temperature-compensated crystal oscillator (TCXO),
crystal, and a bank of nonvolatile memory (FRAM) in a
single package. The nonvolatile memory is available in
two densities: 2048 x 8 and 8192 x 8 bits. The integra-
tion of the crystal resonator enhances the long-term
accuracy of the devices as well as reduces the piece
part count in a manufacturing line. The devices operate
as a slave device on an I2C serial interface, and are
available in both commercial and industrial temperature
ranges in a 300-mil, 20-pin SO package.
The clock/date provides seconds, minutes, hours, day,
date, month, and year information. The date at the end
of the month is automatically adjusted for months with
fewer than 31 days, including corrections for leap year.
The DS32B35/DS32C35 include a bank of nonvolatile
memory that does not require a backup energy source
to maintain memory contents. In addition, there are no
read or write cycle limitations. The memory array can
be accessed at maximum cycle rates for the life of the
product with no wear-out mechanisms.
Other device features include two time-of-day alarms, a
selectable output that provides either an interrupt or
programmable square wave, and a calibrated
32.768kHz square-wave output. A reset input/output pin
provides a power-on reset for other devices.
Additionally, the reset pin is monitored as a pushbutton
input for generating a reset externally.
A precision temperature-compensated voltage refer-
ence and comparator circuit monitor the status of VCC
to detect power failures, to provide a reset output, and
to automatically switch to the backup supply for the
RTC/TCXO when necessary. Additionally, the RSTpin is
monitored as a pushbutton input for generating a reset
externally.
ApplicationsServersUtility Power Meters
TelematicsGPS
FeaturesIntegrated 32.768kHz CrystalFast (400kHz) I2C InterfaceRTC Counts Seconds, Minutes, Hours, Day, Date,Month, and Year with Leap Year CompensationValid Up to 2100RTC Accuracy ±2ppm from 0°C to +40°CRTC Accuracy ±3.5ppm from -40°C to 0°C and+40°C to +85°CNonvolatile Memory with 10 Years of GuaranteedBackup Time and Write ProtectionTwo Available Densities of Nonvolatile Memory2048 Bytes (DS32B35)8192 Bytes (DS32C35)No Cycle Limitations on MemoryPower-Switching Circuit Selects Between MainPower and Battery Backup for the RTCProgrammable Square Wave with Frequency of32.768kHz, 8.192kHz, 4.096kHz, or 1HzTwo Time-of-Day AlarmsReset Output/Pushbutton Reset (Debounced)InputProgrammable Output Provides Interrupt orSquare WaveCalibrated 32.768kHz Open-Drain OutputTemp Sensor with ±3°C Accuracy3.3V Operating VoltageCommercial and Industrial Temperature Ranges300-mil, 20-Pin SO PackageUnderwriters Laboratories (UL) Recognized
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM19-5340; Rev 3; 7/10
Typical Operating Circuit, Pin Configuration, and Selector
Guide appear at end of data sheet.
Ordering Information
PART TEMP RANGE PIN-PACKAGE
DS32B35-33# 0°C to +70°C 20 SO
DS32B35-33IND# -40°C to +85°C 20 SO
DS32C35-33# 0°C to +70°C 20 SO
DS32C35-33IND# -40°C to +85°C 20 SO
#Denotes a RoHS-compliant device that may include lead that
is exempt under RoHS requirements. The lead finish is JESD97
category e3, and is compatible with both lead-based and lead-
free soldering processes. A "#" anywhere on the top mark
denotes a RoHS-compliant device.
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS(TA= -40°C to +85°C, unless otherwise noted.) (Notes 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on Any Pin Relative to Ground......-0.3V to +5.0V
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature......................................................+125°C
Storage Temperature Range...............................-40°C to +85°C
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)....55°C/W
Junction-to-Case Thermal Resistance (θJC) (Note 1)......24°C/W
Lead Temperature (soldering, 10s).................................+260°C
Soldering Temperature (reflow, 2x max)..........................+260°C
(See the Handling, PC Board Layout, and Assemblysection.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSupply Voltage VCC 2.70 3.3 3.63 V
Battery Voltage VBAT (Note 4) 2.3 3.0 3.6 V
Input High Voltage VIH (Note 5) 0.7 x
VCC
VCC +
0.3 V
Input Low Voltage VIL -0.3 +0.3 x
VCCV
ELECTRICAL CHARACTERISTICS(VCC
= 2.7V to 3.63V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS Accessing RTC 260
Active Supply Current ICCA
VCC = 3.63V,
SCL = 400kHz
(Note 6)
Accessing FRAM
memory 260 μA
Standby Supply Current ICCSVCC = 3.63V, SCL = 0kHz,
32kHz on, SQW off (Note 6) 110 μA
Temperature Conversion Current ITCVCC = 3.65V, SCL = 0kHz,
32kHz on, SQW off 575 μA
Power-Fail Voltage VPF 2.45 2.575 2.70 V
Logic 0 Output
32kHz, INT/SQW, SDA VOL IOL = 3mA 0.4 V
Logic 0 Output
RSTVOL IOL = 1mA 0.4 V
Output Leakage Current
32kHz, INT/SQW, SDA ILEAK Output high impedance -1 +1 μA
Input Leakage
SCL ILI -1 +1 μA
RST I/O Leakage IOLRST high impedance (Note 7) -200 +10 μA
VIN = VIL(MAX) 50 kWP Input Resistance RIN
Note 1:Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
ELECTRICAL CHARACTERISTICS (continued)(VCC
= 2.7V to 3.63V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS VBAT Leakage Current
(VCC Active) IBATLKG 25 100 nA
Output Frequency fOUT VCC = 3.3V or VBAT = 3.3V 32.768 kHz
-40°C to 0°C -3.5 +3.5
0°C to +40°C -2 +2 Frequency Stability vs.
Temperature f/fOUTVCC = 3.3V or
VBAT = 3.3V
-40°C to +85°C -3.5 +3.5
ppm
Frequency Stability vs. Voltage f/V 1 ppm/V
-40°C 0.7
+25°C 0.1
+70°C 0.4 Frequency Sensitivity per LSB f/LSB Specified at:
+85°C 0.8
ppm
Temperature Sensor Accuracy Temp VCC = 3.3V or VBAT = 3.3V -3 +3 °C
Temperature Conversion Time tCONV 125 200 ms
ELECTRICAL CHARACTERISTICS(VCC
= 0V, VBAT= 2.3V to 3.6V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS Active Battery Current IBATAEOSC = 0, BBSQW = 0,
SCL = 400kHz (Note 5) VBAT = 3.6V 70 μA
Timekeeping Battery Current IBATT
EOSC = 0, BBSQW = 0,
EN32kHz = 1,
SCL = SDA = 0V or
SCL = SDA = VBAT (Note 6)
VBAT = 3.6V 0.84 3.0 μA
Temperature Conversion Current IBATTC
EOSC = 0, BBSQW = 0,
SCL = SDA = 0V or
SCL = SDA = VBAT
VBAT = 3.6V 575 μA
Data-Retention Current
(RTC/TCXO Registers) IBATDREOSC = 1, SCL = SDA = 0V, +25°C 100 nA
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
AC ELECTRICAL CHARACTERISTICS(VCC= 2.7V to 3.63V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSFast mode 100 400 SCL Clock Frequency fSCLStandard mode 0 100 kHz
Fast mode 1.3 Bus Free Time Between STOP
and START Conditions tBUFStandard mode 4.7 μs
Fast mode 0.6 Hold Time (Repeated) START
Condition (Note 8) tHD:STAStandard mode 4.0 μs
Fast mode 1.3 Low Period of SCL Clock tLOWStandard mode 4.7 μs
Fast mode 0.6 High Period of SCL Clock tHIGHStandard mode 4.0 μs
Fast mode 0 0.9 Data Hold Time (Notes 9, 10) tHD:DAT
Standard mode 0
μs
Fast mode 100 Data Setup Time (Note 11) tSU:DATStandard mode 250 ns
Fast mode 0.6 Setup Time for Repeated START
Condition tSU:STAStandard mode 4.7 μs
Fast mode 300 Rise Time of Both SDA and SCL
Signals (Note 12) tRStandard mode
20 +
0.1CB 1000 ns
Fast mode 300 Fall Time of Both SDA and SCL
Signals (Note 12) tFStandard mode
20 +
0.1CB 300 ns
Fast mode 0.6 Setup Time for STOP Condition tSU:STO
Standard mode 4.0
μs
Capacitive Load for Each Bus
Line (Note 12) CB 400 pF
10 I/O Capacitance
INT/SQW, 32kHz, SCL, SDA CI/O Outputs = high impedance 18 pF
Pushbutton Debounce PBDB (See the Pushbutton Reset Timing diagram) 250 ms
Reset Active Time tRST 250 ms
Oscillator Stop Flag (OSF) Delay tOSF (Note 13) 100 ms
FRAM Data Retention tDR 10 Years
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
POWER-SWITCH CHARACTERISTICS(TA= -40°C to +85°C, Note 2, see the Power-Switch Timingdiagram.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS VCC Fall Time; VPF(MAX) to
VPF(MIN)tVCCF 300 μs
VCC Rise Time; VPF(MIN) to
VPF(MAX)tVCCR 0 μs
Recovery at Power-Up tREC (Note 14) 300 ms
Note 2:Limits at -40°C are guaranteed by design and not production tested.
Note 3:All voltages are referenced to ground.
Note 4:To minimize current drain on VBATwhen the internal supply is switched to VBAT, the VIHminimum must be higher than
VBAT- 0.6V. Otherwise, there is significant current drain due to the input stage at the SCL and SDA pins.
Note 5:The pullup resistor voltage on the 32kHz and INT/SQW pins can be up to 5.5V maximum regardless of the voltage on VCC.
Note 6:Current is the averaged input current, which includes the temperature conversion current.
Note 7:The RSTpin has an internal 50kΩ(nominal) pullup resistor to VCC.
Note 8:After this period, the first clock pulse is generated.
Note 9:A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the VIH(MIN)of the SCL sig-
nal) to bridge the undefined region of the falling edge of SCL.
Note 10:The maximum tHD:DATneeds only to be met if the device does not stretch the low period (tLOW) of the SCL signal.
Note 11:A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT≥250ns must then be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line tR(MAX)+ tSU:DAT= 1000 + 250 = 1250ns
before the SCL line is released.
Note 12:CB—total capacitance of one bus line in pF.
Note 13:The parameter tOSFis the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of
0.0V ≤VCC≤VCC(MAX) and 2.0V ≤VBAT≤3.6V.
Note 14:This delay applies only if the oscillator is enabled and running. If the EOSCbit is a 1, tRECis bypassed and RSTimmedi-
ately goes high. The state of RSTdoes not affect the I2C interface, RTC, TCXO, or FRAM operation.
WARNING:Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data.
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
Pushbutton Reset TimingtRSTPBDB
RST
Power-Switch TimingVCC
tVCCFtVCCR
tREC
VPF(MAX)
VPFVPF
VPF(MIN)
RST
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
SUPPLY CURRENT
vs. TEMPERATUREDS32x35 toc03
TEMPERATURE (°C)
IBAT3510-15
VCC = 0V, EN32kHz = 1, BSY = 0,
SDA = SCL = VBAT OR GND
FREQUENCY DEVIATION vs.
TEMPERATURE vs. AGING VALUEDS32x35 toc04
TEMPERATURE (°C)
FREQUENCY DEVIATION (ppm)3510-15
STANDBY SUPPLY CURRENT
vs. SUPPLY VOLTAGE
DS32x35 toc01
VCC (V)
ICCS
BSY = 0,
SDA = SCL = VCC
RST ACTIVE
SUPPLY CURRENT
vs. SUPPLY VOLTAGEDS32x35 toc02
VBAT (V)
IBAT
VCC = 0V, BSY = 0,
SDA = SCL = VBAT OR VCC
EN32kHz = 1
EN32kHz = 0
Typical Operating Characteristics(VCC= +3.3V, TA = +25°C, unless otherwise noted.)
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
Block DiagramRST
VCC
32kHz
INT/SQW
CLOCK AND CALENDAR
REGISTERS
USER BUFFER
(7 BYTES)
I2C INTERFACE AND
ADDRESS REGISTER
DECODE
POWER CONTROL
VCC
SCL
VBAT
GND
SCL
SDA
TEMPERATURE
SENSOR
FRAM
CONTROL LOGIC/
DIVIDER
PUSHBUTTON RESET;
SQUARE-WAVE BUFFER;
INT/SQW CONTROL
CONTROL AND STATUS
REGISTERS
OSCILLATOR AND
CAPACITOR ARRAY
DS32B35/DS32C35
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
Pin Description
PINNAMEFUNCTION1 WP Write Protect. When WP is high, the entire FRAM memory array is write protected. When WP is low, all
addresses can be written. This pin is internally pulled down.
7–14 N.C. No Connection. Must be connected to ground.
3 32kHz 32kHz Output. This open-drain pin requires an external pullup resistor. When enabled, the output operates
on either power supply. It can be left open if not used.
4 VCC DC Power Pin for Primary Power Supply. This pin should be decoupled using a 0.1μF to 1.0μF capacitor. INT/SQW
Active-Low Interrupt or Square-Wave Output. This open-drain pin requires an external pullup resistor
connected to VCC or another supply of 5.5V or less. It can be left open if not used. This multifunction pin is
determined by the state of the INTCN bit in the Control register (0Eh). When INTCN is set to logic 0, this pin
outputs a square wave and its frequency is determined by the RS2 and RS1 bits. When INTCN is set to logic
1, a match between the timekeeping registers and either of the alarm registers activates the INT/SQW pin (if
the alarm is enabled). Because the INTCN bit is set to logic 1 when power is first applied, the pin defaults to
an interrupt output with alarms disabled.RST
Active-Low Reset. This pin is an open-drain input/output. It indicates the status of VCC relative to the
VPF specification. As VCC falls below VPF, the RST pin is driven low. When VCC exceeds VPF, for tRST, the
open-drain pulldown transistor is shut off, and the internal pullup resistor pulls the RST pin to VCC. The active-
low, open-drain output is combined with a debounced pushbutton input function. This pin can be activated by
a pushbutton reset request. It has an internal 50k nominal value pullup resistor to VCC. No external pullup
resistors should be connected. If the EOSC bit is 1, tREC is bypassed and RST immediately goes high.
15, 19 GND Ground. Must be connected together to ground.
16 VBAT
Backup Power-Supply Input. When using the device with the VBAT input as the primary power source, this
pin should be decoupled using a 0.1μF to 1.0μF low-leakage capacitor. When using the device with the
VBAT input as the backup power source, the capacitor is not required. If VBAT is not used, connect to ground.
The devices are UL recognized to ensure against reverse charging when used with a primary lithium
battery. Go to /qa/info/ul.
17 SDA Serial Data Input/Output. This pin is the data input/output for the I2C serial interface. This open-drain pin
requires an external pullup resistor.
18, 20 SCL Serial Clock Input. These pins are the clock input for the I2C serial interface and are used to synchronize
data movement on the serial interface.
Detailed DescriptionThe DS32B35/DS32C35 accurate RTCs are clock/cal-
endars that include an integrated TCXO, crystal, and a
bank of nonvolatile memory (FRAM) in a single pack-
age. The nonvolatile memory is available in two sizes:
2048 x 8 or 8192 x 8 bits. The integration of the crystal
resonator enhances the long-term accuracy of the
device as well as reduces the piece part count in a
manufacturing line. The devices are available in both
commercial and industrial temperature ranges and is
offered in a 300-mil, 20-pin SO package.
The DS32B35/DS32C35 include a bank of nonvolatile
memory that do not require a backup energy source to
maintain the memory contents. In addition, there are no
read or write cycle limitations. The memory array can
be accessed at maximum cycle rates for the life of the
product with no wear-out mechanisms.
A precision temperature-compensated reference and
comparator circuit monitors the status of VCCand auto-
matically switches to the backup supply when neces-
sary. Other device features include two time-of-day
alarms, a selectable output that provides either an
interrupt or programmable square wave, and a calibrat-
ed 32.768kHz square-wave output. A reset input/output
pin provides a power-on reset. Additionally, the reset
pin is monitored as a pushbutton input for generating a
reset externally. The devices are accessed through an
I2C serial interface.
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
OperationThe Block Diagramshows the main elements of the
DS32B35/DS32C35. The nine blocks can be grouped
into six functional groups: TCXO, power control, pushbut-
ton function, RTC, I2C interface, and FRAM. Their opera-
tions are described separately in the following sections.
32kHz TCXOThe temperature sensor, oscillator, and control logic
form the TCXO. The controller reads the output of the
on-chip temperature sensor and uses a lookup table to
determine the capacitance required, adds the aging
correction in the AGE register, and then sets the
capacitance selection registers. New values, including
changes to the AGE register, are loaded only when a
change in the temperature value occurs, or when a
user-initiated temperature conversion is completed.
The temperature is read on initial application of VCC
and once every 64 seconds afterwards while the
device is powered by either VCCor VBAT.
Power ControlThis function is provided by a temperature-compensat-
ed voltage reference and a comparator circuit that
monitors the VCClevel. When VCCis greater than VPF,
the part is powered by VCC. When VCCis less than VPF
but greater than VBAT, the RTC is powered by VCC. If
VCCis less than VPFand is less than VBAT, the device
is powered by VBAT. See Table 1.
The RTC can be accessed when the device is powered
by either VCCor VBAT. The FRAM is only accessible
when the device is powered by VCC. The FRAM must
not be accessed when VCC< VCC(MIN).
To preserve the battery, the first time VBATis applied to
the device, the oscillator will not start up until VCC
exceeds VPF, or until a valid I2C address is written to
the part. Typical oscillator startup time is less than one
second. Approximately 2 seconds after VCCis applied,
or a valid I2C address is written, the device makes a
correction to the oscillator. Once the oscillator is run-
ning, it continues to run as long as a valid power
source is available (VCCor VBAT), and the device con-
tinues to measure the temperature and correct the
oscillator frequency every 64 seconds.
On the first application of power (VCC) or when a valid2C address is written to the part (VBAT), the time and
date registers are reset to 01/01/00 01 00:00:00
(MM/DD/YY DOW HH:MM:SS).
Pushbutton Reset FunctionThe device provides for a pushbutton switch to be con-
nected to the RSToutput pin. When the device is not in
a reset cycle, it continuously monitors the RSTsignal
for a low going edge. If an edge transition is detected,
the device debounces the switch by pulling RSTlow.
After the internal timer has expired (PBDB), the device
continues to monitor the RSTline. If the line is still low,
the device continuously monitors the line looking for a
rising edge. Upon detecting release, the device forces
the RSTpin low and holds it low for tRST.
RSTis also used to indicate a power-fail condition. When
VCCis lower than VPF, an internal power-fail signal is
generated, which forces the RSTpin low. When VCC
returns to a level above VPF, the RSTpin is held low for
tRECto allow the power supply to stabilize. If the oscilla-
tor is not running (see the Power Control section) when
VCCis applied, tRECis bypassed and RSTimmediately
goes high. The state of RSTdoes not affect the operation
of the TCXO, I2C interface, FRAM, or RTC functions.
Real-Time ClockWith the clock source from the TCXO, the RTC provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is automati-
cally adjusted for months with fewer than 31 days, includ-
ing corrections for leap year. The clock operates in either
the 24-hour or 12-hour format with an AM/PM indicator.
The clock provides two programmable time-of-day
alarms and a programmable square-wave output. The
INT/SQW pin either generates an interrupt due to alarm
condition or outputs a square-wave signal and the
selection is controlled by the bit INTCN.
2C InterfaceThe FRAM I2C interface is accessible whenever VCCis
at a valid level. The RTC I2C interface is accessible
whenever either VCCor VBATis at a valid level. If a
microcontroller connected to the device resets because
of a loss of VCCor other event, it is possible that the
microcontroller and the RTC I2C communications could
become unsynchronized, e.g., the microcontroller resets
while reading data from the RTC. When the microcon-
SUPPLY CONDITION POWERED
BY
FRAM
ACCESS*
RTC
ACCESS VCC < VPF, VCC < VBAT VBAT No Yes
VCC < VPF, VCC > VBAT VCC No Yes
VCC > VPF, VCC < VBAT VCC Yes Yes
VCC > VPF, VCC > VBAT VCC Yes Yes
Table 1. Device Operation*Read/write access is not inhibited by the device, but must not
be done to avoid FRAM data errors.
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAMtroller resets, the RTC I2C interface may be placed into
a known state by toggling SCL until SDA is observed to
be at a high level. At that point the microcontroller
should pull SDA low while SCL is high, generating a
START condition.
FRAMThe serial FRAM memory is logically organized as a
2048 x 8 or 8192 x 8 memory array and is accessed
using the I2Cinterface. Functional operation of the
FRAM is similar to serial EEPROMs with the major dif-
ference being its superior performance on writes. The
memory is read or written at the speed of the I2Cinter-
face. It is not necessary to poll the device for a ready
condition during writes.
Due to the different memory densities, the I2C address-
ing technique is different for each version of the device.
See the I2C Serial Data Bussection for details.
Warning:The FRAM does not inhibit reads or writes
when VCCis below the minimum operating voltage.
FRAM reads are destructive, that is, when a read is
performed, the device internally writes the memory
back to the original value. The FRAM must not be read
or written when VCCis below the minimum operating
voltage; otherwise, the memory cells may not be fully
programmed, and the data may not be retained.
RTC Address MapTable3 shows the RTC address map for the timekeep-
ing registers. During a multibyte access, when the
address pointer reaches the end of the register space,
it wraps around to location 00h. On an I2CSTART or
address pointer incrementing to location 00h, the cur-
rent time is transferred to a second set of registers. The
time information is read from these secondary registers,
while the clock continues to run. This eliminates the
need to reread the registers in case the main registers
update during a read.
Clock and CalendarThe time and calendar information is obtained by read-
ing the appropriate register bytes. Table 3 illustrates the
RTC registers. The time and calendar data are set or ini-
tialized by writing the appropriate register bytes. The con-
tents of the time and calendar registers are in the
binary-coded decimal (BCD) format. The device can be
run in either 12-hour or 24-hour mode. Bit 6 of the hours
register is defined as the 12- or 24-hour mode select bit.
When high, the 12-hour mode is selected. In the 12-hour
mode, bit 5 is the AM/PM bit with logic-high being PM. In
the 24-hour mode, bit 5 is the 20-hour bit (20 to 23 hours).
The century bit (bit 7 of the month register) is toggled
when the years register overflows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers on any STARTand when the register
pointer rolls over to zero. The time information is read
from these secondary registers while the clock continues
to run. This eliminates the need to reread the registers in
case the main registers update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the device. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer, provided that the oscil-
lator is already running.
DEVICE SLAVE ADDRESS DS32B35 1010 A10A9A8R
DS32C35 1010 000R
R = Read/write select bit
Table 2. Memory Slave Address
