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DS3112RD
DS3/E3 Multiplexer Reference Design
GENERAL DESCRIPTION The DS3112RD is a reference design for the DS3112
DS3/E3 framer/mux and the DS3150 DS3/E3 LIU. Both devices are surface mounted to minimize board
size and to provide signal integrity. The DK101/DK2000 motherboard and included software
give point-and-click access to configuration and status registers from a Windows®-based PC. LEDs
on the board indicate loss-of-signal, transmit driver monitor, and PRBS sync status of the LIU. The board
provides BNC connectors for an external clock, the line-side transmit and receive differential pairs, and a
connector for data path interface. A PLD provides registered access to the LIU control pins along with
control of clock and data paths.
Each DS3112RD is shipped with a free DK101
motherboard. For complex applications, the DK2000 high-performance demo kit motherboard can be
purchased separately.
Windows is a registered trademark of Microsoft Corp.
REFERENCE DESIGN CONTENTS DS3112RD Daughter Card DK101 Demo Kit Motherboard
CD-ROM ChipView Software
DS3112RD.DEF Definition File DS3112.DEF Definition File
DS3112RD Data Sheet DS3112 Data Sheet
DS3150 Data Sheet
ORDERING INFORMATION
FEATURES Soldered DS3150 and DS3112 BNC Connectors, Transformers, and Termination Passives for the LIU Careful Layout for Analog Signal Paths Memory-Mapped PLD for Control of DS3150 BNC Connectors for External Clock and Line-Side Interface Compatible with DK101 and DK2000 Demo Kit Motherboards DK101/DK2000 and Included Software Provide Point-and-Click Access to the DS3112 Register
Set LEDs for Loss-of-Signal, Transmit Driver Monitor,
and PRBS Sync
DS3112RD
DS3/E3 Multiplexer Reference Design
DS3112RD DS3/E3 Multiplexer Reference Design
COMPONENT LIST
BOARD FLOORPLAN DS3112RD DS3/E3 Multiplexer Reference Design
PLD MEMORY MAP The PLD on the DS3112RD is used to route clocks from the processor board DK2000/DK101 and to control the
DS3150 and the DS3112. The PLD is mapped at address 00h and contains 25 registers. The first eight registers (excluding register address 01h, which has no function on the 3112RD) are read-only, and are programmed at the
factory to document board identification and revision information. The next 16 registers control the state of pins on the DS3150 and DS3112. The last register controls the clock source to the FTCLK pin on the DS3112 and the
MCLK pin on the DS3150. The PLD provides tri-state control of the pins. If a 01h is written to a register, the corresponding pin is forced high, a value of 00h forces the pin low, and writing any other value puts the pin in a tri-
state mode. The bit descriptions in the definition file for the DS3112RD describe how to control a pin specifically (Table 1). For more information about definition files, refer to the DK101 data sheet or the DK2000 data sheet.
MEMORY MAP The DS3112 is mapped at 1000h.
Table 1. DS3112RD CPLD Register Map
DS3112RD DS3/E3 Multiplexer Reference Design
LINE-SIDE CONNECTIONS
The DS3112RD implements the transmit (Tx) and receive (Rx) line interface networks recommended in the
DS3150 data sheet (Figure 1). The BNC connectors are labeled J1 (Tx) and J2 (Rx). Figure 1. Line-Side Circuitry INTERFACE CONNECTOR
Two 50-pin connectors (J4, J5) on the bottom of the board provide the processor interface, clocks, and power
supply from the DK101 or DK2000 motherboards. These connectors also provide a bidirectional clock/data/sync connection with the DK2000. The third connector (J6) is provided for future expansion on the DK2000 and is not
connected on the DS3112RD.
CONNECTING TO A COMPUTER
Refer to the DK101 data sheet or the DK2000 data sheet for information.
BASIC OPERATION
The DS3112RD powers up in the T3 mode, transmitting all ones, as specified by the default values in the CPLD registers (Table 1) and the DS3112’s reset condition. The processor interface supplies the transmit clock by
default. The user must access registers in the DS3112 and the CPLD to configure the board. To facilitate configuration, definition files that support the DS3112 reference design (DS3112.DEF, DS3112RD.DEF) can be
our website, /DS3112RD.
DS3112RD INFORMATION
For more information about the DS3112RD—including the ChipView software, the latest support files (.DEF, .INI,
etc.), and the latest data sheet—please visit our website at /DS3112RD.
DS3112 INFORMATION
For more information about the DS3112, please consult the DS3112 data sheet, available on our website at
/DS3112.
DS3112RD DS3/E3 Multiplexer Reference Design
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
DS3150 INFORMATION
For more information about the DS3150, please consult the DS3150 data sheet, available on our website at
/DS3150.
DK101/DK2000 INFORMATION
For more information about the DK101 or DK2000, please consult their respective data sheets, available on our
website at /DK101 and /DK2000.
TECHNICAL SUPPORT
For additional technical support, please e-mail your questions to [email protected].
