DS3050W-100# Fast Delivery |IC PHOENIX CO.,LIMITED

DS3050W-100# ,3.3V Single-Piece 4Mb Nonvolatile SRAM with ClockApplicationsTimerRAID Systems and Servers Gaming♦ Industrial Temperature Range (-40°C to +85°C)POS ..
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DS3050W-100#
3.3V Single-Piece 4Mb Nonvolatile SRAM with Clock
General Description
The DS3050W consists of a static RAM, a nonvolatile
(NV) controller, a year 2000-compliant real-time clock
(RTC), and an internal rechargeable manganese lithium
(ML) battery. These components are encased in a sur-
face-mount module with a 256-ball BGA footprint.
Whenever VCCis applied to the module, it recharges
the ML battery, powers the clock and SRAM from the
external power source, and allows the contents of the
clock registers or SRAM to be modified. When VCC is
powered down or out-of-tolerance, the controller write-
protects the memory contents and powers the clock
and SRAM from the battery. The DS3050W also con-
tains a power-supply monitor output (RST), as well as a
user-programmable interrupt output (IRQ/FT).
Applications
RAID Systems and ServersGaming
POS TerminalsFire Alarms
Industrial ControllersPLCs
Data-Acquisition SystemsRouters/Switches
FeaturesSingle-Piece, Reflowable, 27mm x 27mm BGA
Package FootprintInternal Manganese Lithium Battery and ChargerIntegrated Real-Time ClockUnconditionally Write-Protects the Clock and
SRAM when VCCis Out-of-ToleranceAutomatically Switches to Battery Supply when
VCCPower Failures OccurReset Output can be Used as a CPU SupervisorInterrupt Output can be Used as a CPU Watchdog
TimerIndustrial Temperature Range (-40°C to +85°C)UL Recognized
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
DATA
ADDRESS
INTRST
A0–18
DQ0–7
19 BITS
8 BITS
MICROPROCESSOR
OR DSP
DS3050W
512k x 8
NV SRAM
AND RTCWEOE
INTIRQ/FTCS
Typical Operating Circuit
Rev 2; 10/06
Ordering Information
Pin Configuration appears at end of data sheet.
PARTTEMP RANGEPIN-PACKAGESPEEDSUPPLY VOLTAGE
DS3050W-100#-40°C to +85°C256-ball 27mm x 27mm BGA Module100ns3.3V ±0.3V
#Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements.
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
(TA= -40°C to +85°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on Any Pin Relative to Ground......-0.3V to +4.6V
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range...............................-40°C to +85°C
Soldering Temperature Range..........See IPC/JEDEC J-STD-020
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVCC3.03.33.6V
Input Logic 1VIH2.2VCCV
Input Logic 0VIL0.00.4V
PIN CAPACITANCE
(TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input CapacitanceCINNot production tested15pF
Input/Output CapacitanceCOUTNot production tested15pF
DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±0.3V, TA = -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input Leakage CurrentIIL-1.0+1.0µA
I/O Leakage CurrentIIOCE = CS = VCC-1.0+1.0µA
Output-Current HighIOHAt 2.4V-1.0mA
Output-Current LowIOLAt 0.4V2.0mA
Output-Current Low RSTIOL RSTAt 0.4V (Note 1)8.0mA
Output-Current Low IRQ/FTIOL IRQ/FTAt 0.4V (Note 1)7.0mA
ICCS1CE = CS = 2.2V0.57Standby CurrentICCS2CE = CS = VCC - 0.2V0.25mA
Operating CurrentICCO1tRC = 200ns, outputs open50mA
Write Protection VoltageVTP2.82.93.0V
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
AC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±0.3V, TA = -40°C to +85°C.)
DS3050W-100PARAMETERSYMBOLCONDITIONSMINMAXUNITS
Read Cycle TimetRC100ns
Access TimetACC100ns
OE to Output ValidtOE50ns
RTC OE to Output ValidtOEC60ns
CE or CS to Output ValidtCO100ns
OE or CE or CS to Output ActivetCOE(Note 2)5ns
Output High Impedance from
DeselectiontOD(Note 2)40ns
Output Hold from AddresstOH5ns
Write Cycle TimetWC100ns
Write Pulse WidthtWP(Note 3)75ns
Address Setup TimetAW0ns
tWR1(Note 4)5Write Recovery TimetWR2(Note 5)20ns
Output High Impedance from WEtODW(Note 2)40ns
Output Active from WEtOEW(Note 2)5ns
Data Setup TimetDS(Note 6)40ns
tDH1(Note 4)0Data Hold TimetDH2(Note 5)20ns
Chip-to-Chip Setup TimetCCS40ns
POWER-DOWN/POWER-UP TIMING
(TA = -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
VCC Fail Detect to CE, CS, and
WE InactivetPD(Note 7)1.5µs
VCC Slew from VTP to 0VtF150µs
VCC Slew from 0V to VTPtR150µs
VCC Valid to CE, CS, and WE
InactivetPU2ms
VCC Valid to End of Write
ProtectiontREC125ms
VCC Fail Detect to RST ActivetRPD(Note 1)3.0µs
VCC Valid to RST InactivetRPU(Note 1)40350525ms
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Note 1:IRQ/FT and RSTare open-drain outputs and cannot source current. External pullup resistors should be connected to these
pins to realize a logic-high level.
Note 2:These parameters are sampled with a 5pF load and are not 100% tested.
Note 3:tWPis specified as the logical AND of CEwith WEfor SRAM writes, or CSwith WEfor RTC writes. tWPis measured from
the latter of the two related edges going low to the earlier of the two related edges going high.
Note 4:tWR1and tDH1are measured from WEgoing high.
Note 5:tWR2and tDH2are measured from CEgoing high for SRAM writes or CSgoing high for RTC writes.
Note 6:tDSis measured from the earlier of CEor WEgoing high for SRAM writes, or from the earlier of CSor WEgoing high for
RTC writes.
Note 7:In a power-down condition, the voltage on any pin may not exceed the voltage on VCC.
Note 8:The expected tDRis defined as accumulative time in the absence of VCCstarting from the time power is first applied by the
user. Minimum expected data-retention time is based upon a maximum of two +230°C convection reflow exposures, fol-
lowed by a fully charged cell. Full charge occurs with the initial application of VCCfor a minimum of 96 hours. This parame-
ter is assured by component selection, process control, and design. It is not measured directly during production testing.
Note 9:WEis high for any read cycle.
Note 10:OE= VIHor VIL. If OE= VIHduring write cycle, the output buffers remain in a high-impedance state.
Note 11:If the CEor CSlow transition occurs simultaneously with or latter than the WElow transition, the output buffers remain in a
high-impedance state during this period.
Note 12:If the CEor CShigh transition occurs prior to or simultaneously with the WEhigh transition, the output buffers remain in a
high-impedance state during this period.
Note 13:If WEis low or the WElow transition occurs prior to or simultaneously with the related CEor CSlow transition, the output
buffers remain in a high-impedance state during this period.
DATA RETENTION
(TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Expected Data-Retention Time
(Per Charge)tDR(Notes 7, 8)23Years
AC TEST CONDITIONS
Input Pulse Levels:VIL= 0.0V, VIH= 2.7V
Input Pulse Rise and Fall Times:5ns
Input and Output Timing Reference Level:1.5V
Output Load:1 TTL Gate + CL(100pF) including scope and jig
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Read Cycle
OUTPUT
DATA VALID
tRC
tACC
tCO
tOE
tOEC
tOH
tOD
tODtCOE
tCOE
VIHVIH
VIL
VOH
VOL
VOH
VOL
VIL
VIH
ADDRESSES
DOUT
(SEE NOTE 9.)
VIH
VIHVIH
VIH
VIL
VIL
VIL
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Write Cycle 1
DATA IN STABLE
ADDRESSES
DOUT
DIN
tWC
VIH
VIH
VIH
VIH
VIL
VIL
VIL
HIGH
IMPEDANCE
VIH
VIH
VIL
VIL
VIH
VIL
VIL
VIL
VIL
tAW
tWP
tOEW
tDH1tDS
tODW
tWR1
(SEE NOTES 2, 3, 4, 6, 10–13.)
Write Cycle 2
tWC
tAW
tDH2tDS
tCOEtODW
tWPtWR2
VIH
VIL
VIHADDRESSES
DOUT
DIN
VIL
VIH
VIL
VIH
VIL
VIL
VIL
VIL
VIH
VIH
VIL
VIH
DATA IN STABLE
VIL
VIH
VIL
(SEE NOTES 2, 3, 5, 6, 10–13.)
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Power-Down/Power-Up Condition
tDR
tPU
tPD
tRPUtRPD
SLEWS WITH
VCC
VOL
VIH
VOL
tREC
VCC
VTP
~2.5V
CE,
RST
BACKUP CURRENT
SUPPLIED FROM
LITHIUM BATTERY
(SEE NOTES 1, 7.)
AND
Typical Operating Characteristics
(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. OPERATING FREQUENCY
DS3050W toc01
VCC (V)
SUPPLY CURRENT (mA)
TA = +25°C
5MHz CE-ACTIVATED
50% DUTY CYCLE
1MHz ADDRESS-ACTIVATED
100% DUTY CYCLE
1MHz CE-ACTIVATED
50% DUTY CYCLE
5MHz ADDRESS-ACTIVATED
100% DUTY CYCLE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
DS3050W toc02
VCC (V)
SUPPLY CURRENT (
VCC = CE = 3.3V,
VBAT = VCHARGE,
OSC = ON
BATTERY CHARGER CURRENT
vs. BATTERY VOLTAGE
DS3050W toc03
DELTA V BELOW VCHARGE (V)
BATTERY CHARGER CURRENT, I
CHARGE
(mA)
VCC = CE = 3.3V
VCHARGE
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
VCHARGE PERCENT CHANGE
vs. TEMPERATURE
DS3050W toc04
TEMPERATURE (°C)
HARGE
PERCENT CHANGE FROM 25
C (%)3510-15
VCC = 3.3V,
VBAT = VCHARGE
WRITE PROTECTION VOLTAGE
vs. TEMPERATURE
DS3050W toc05
TEMPERATURE (°C)
WRITE PROTECT, V
(V)3510-15
DQ OUTPUT-VOLTAGE HIGH
vs. DQ OUTPUT-CURRENT HIGH
DS3050W toc06
IOH (mA)
(V)-2-3-4
VCC = 3.3V
DQ OUTPUT-VOLTAGE LOW
vs. DQ OUTPUT-CURRENT LOW
DS3050W toc07
IOL (mA)
(V)321
VCC = 3.3V
IRQ/FT OUTPUT-VOLTAGE LOW
vs. OUTPUT-CURRENT LOW
DS3050W toc08
IOL (mA)
(V)105
RST OUTPUT-VOLTAGE LOW
vs. OUTPUT-CURRENT LOW
DS3050W toc09
IOL (mA)
(V)105
VCC = 2.8Vypical Operating Characteristics (continued)
(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
RST VOLTAGE
vs. VCC DURING POWER-UP
DS3050W toc10
VCC POWER-UP (V)
RST VOLTAGE W/PULLUP RESISTOR (V)
TA = +25°C
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Pin Description
BALLSNAMEDESCRIPTION
A1, A2, A3, A4GNDGround
B1, B2, B3, B4IRQ/FTInterrupt/Frequency Test
Output
C1, C2, C3, C4A15Address Input 15
D1, D2, D3, D4A16Address Input 16
E1, E2, E3, E4RSTReset Output
F1, F2, F3, F4VCCSupply Voltage
G1, G2, G3, G4WEWrite Enable Input
H1, H2, H3, H4OEOutput Enable Input
J1, J2, J3, J4CESRAM Chip Enable Input
K1, K2, K3, K4DQ7Data Input/Output 7
L1, L2, L3, L4DQ6Data Input/Output 6
M1, M2, M3, M4DQ5Data Input/Output 5
N1, N2, N3, N4DQ4Data Input/Output 4
P1, P2, P3, P4DQ3Data Input/Output 3
R1, R2, R3, R4DQ2Data Input/Output 2
T1, T2, T3, T4DQ1Data Input/Output 1
U1, U2, U3, U4DQ0Data Input/Output 0
V1, V2, V3, V4GNDGround
W1, W2, W3, W4GNDGround
Y1, Y2, Y3, Y4GNDGround
A17, A18, A19, A20GNDGround
B17, B18, B19, B20A18Address Input 18
C17,C18,C19, C20A17Address Input 17
D17, D18, D19, D20A14Address Input 14
E17, E18, E19, E20A13Address Input 13
F17, F18, F19, F20A12Address Input 12
G17, G18, G19, G20A11Address Input 11
H17, H18, H19, H20A10Address Input 10
J17, J18, J19, J20A9Address Input 9
K17, K18, K19, K20A8Address Input 8
L17, L18, L19, L20A7Address Input 7
M17, M18, M19, M20A6Address Input 6
BALLSNAMEDESCRIPTION
N17, N18, N19, N20A5Address Input 5
P17, P18, P19, P20A4Address Input 4
R17, R18, R19, R20A3Address Input 3
T17, T18, T19, T20A2Address Input 2
U17, U18, U19, U20A1Address Input 1
V17, V18, V19, V20A0Address Input 0
W17, W18, W19, W20GNDGround
Y17, Y18, Y19, Y20GNDGround
A5, B5, C5, D5N.C.No Connection
A6, B6, C6, D6N.C.No Connection
A7, B7, C7, D7N.C.No Connection
A8, B8, C8, D8N.C.No Connection
A9, B9, C9, D9N.C.No Connection
A10, B10, C10, D10VCCSupply Voltage
A11, B11, C11, D11N.C.No Connection
A12, B12, C12, D12N.C.No Connection
A13, B13, C13, D13N.C.No Connection
A14, B14, C14, D14N.C.No Connection
A15, B15, C15, D15N.C.No Connection
A16, B16, C16, D16N.C.No Connection
U5, V5, W5, Y5CSRTC Chip Select Input
U6, V6, W6, Y6N.C.No Connection
U7, V7, W7, Y7N.C.No Connection
U8, V8, W8, Y8N.C.No Connection
U9, V9, W9, Y9N.C.No Connection
U10, V10, W10, Y10N.C.No Connection
U11, V11, W11, Y11N.C.No Connection
U12, V12, W12, Y12N.C.No Connection
U13, V13, W13, Y13N.C.No Connection
U14, V14, W14, Y14N.C.No Connection
U15, V15, W15, Y15N.C.No Connection
U16, V16, W16, Y16N.C.No Connection

Partno	Mfg	Dc	Qty	Available	Descript
DS3050W-100# \|DS3050W100#	MAXIM	N/a	1500	avai	3.3V Single-Piece 4Mb Nonvolatile SRAM with Clock