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DS2746G+
Low-Cost, 2-Wire Battery Monitor with Ratiometric A/D Inputs
19-4632; 5/09
DS2746
Low-Cost 2-Wire Battery Monitor
with Ratiometric A/D Inputs
GENERAL DESCRIPTION The DS2746 provides system-side battery capacity
monitoring in cost-sensitive applications. Voltage,
bidirectional current, and accumulated current
measurement data is provided to the host processor
over a 2-wire interface. Offset bias and offset
blanking features greatly enhance the accuracy of
the coulomb counter. In addition, the DS2746 has
two auxiliary A/D inputs to sample the pack
identification resistor, thermistor, or other voltage
source. The results are reported as a ratiometric
fraction of the supply voltage eliminating error related
to the supply. The DS2746 reduces the total power
consumption of the measurement circuit by enabling
the resistor dividers, through the VOUT pin, only while
measurements are made. When the system is
inactive, a low power sleep mode reduces current
consumption while maintaining the coulomb count.
The tiny 3mm × 3mm TDFN package consumes only
9mm2 of PCB space.
APPLICATIONS 2.5G/3G Wireless Handsets
PDA/Smartphones
Digital Still and Video Cameras
Handheld Computers and Terminals
TYPICAL OPERATING CIRCUIT
FEATURES 14-Bit Bidirectional Current Measurement
- 6.25V LSB, ±51.2mV Dynamic Range
- 416.7A LSB, ±3.4A Range (RSNS = 15m) Current Accumulation Register Resolution
- 6.25Vhr LSB, 409.6mVh Range
- 417Ahr LSB, 27.31Ah Range 11-Bit Battery Voltage Measurement 2.44mV LSB, 0V to 4.5V Input Range ±10mV Accuracy at 3.6V Input Two 11-Bit Aux Input Voltage Measurements Ratiometric Inputs Eliminate Supply Error VOUT drives Dividers, Reduces Power ±8 LSB Accuracy Low Power Consumption: Active Current: 70A typical, 100A max Sleep Current: 1A typical, 3A max
ORDERING INFORMATION
PART TEMP RANGE PIN-PACKAGE DS2746G+ -20ºC to +70ºC 10-Pin 3mm×3mm
TDFN
DS2746G+T&R -20ºC to +70ºC DS2746G+ in Tape-
and-Reel
+ Denotes lead(Pb)-free/RoHS-compliant package.
PIN CONFIGURATION TOP VIEW
3mm × 3mm TDFN
DS2746 Low-Cost 2-Wire Battery Monitor
ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.3V to +6V
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature See IPC/JEDECJ-STD-020A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS (VDD = 2.5V to 4.5V, TA = -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VDD (Note 1) +2.5 +4.5 V
Data I/O Pins SCL, SDA (Note 1) -0.3 +5.5 V
Programmable I/O Pin PIO (Note 1) -0.3 +5.5 V
VIN, AIN0, AIN1 Pin VIN, AIN0,
AIN1 (Note 1) -0.3 VDD + 0.3 V
DC ELECTRICAL CHARACTERISTICS (VDD = 2.5V to 4.5V, TA = -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 70 100 Active Current IACTIVE VDD = 4.5V 105 A
VDD = 2.0V,
SCL, SDA = Vss 0.5 1.0 Sleep-Mode Current ISLEEP
SCL, SDA = Vss 1 3 A
Current Resolution ILSB 6.25 V
Current Full-Scale Magnitude IFS (Note 1) ±51.2 mV
Current Offset IOERR (Note 2) -12.5 +12.5 V
Current Gain Error IGERR (Note 11) -1.5 +1.5 % of
reading
VDD = 3.6V at +25°C -1 +1
TA = 0C to +70C -2 +2 % Timebase Accuracy tERR
TA = -20C to +70C -3 +3
VDD = VIN = 3.6V -10 +10 Voltage Error VGERR -20 +20 mV
Input Resistance
VIN, AIN0, AIN1 RIN 15 MΩ
AIN0, AIN1 Error AINGERR (Note 10) -8 +8 LSB
VOUT Output Drive IO = 1mA VDD -0.1 V
VOUT Precharge Time tPRE VODIS bit = 0 13.3 14.2 ms
Input Logic High:
SCL, SDA VIH (Note 1) 1.5 V
Input Logic Low:
SCL, SDA VIL (Note 1) 0.6 V
Output Logic Low:
SDA VOL IOL = 4mA, (Note 1) 0.4 V
DS2746 Low-Cost 2-Wire Battery Monitor
SCL, SDA VPIN = 0.4V
Input Capacitance:
SCL, SDA CBUS 50 pF
Bus Low Timeout tSLEEP (Note 3) 1.5 2.2 S
DC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (VDD = 2.5V to 4.5V, TA = -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL (Note 4) 0 400 KHz
Bus Free Time Between a
STOP and START Condition tBUF 1.3 µs
Hold Time (Repeated)
START Condition tHD:STA (Note 5) 0.6 µs
Low Period of SCL Clock tLOW 1.3 µs
High Period of SCL Clock tHIGH 0.6 µs
Setup Time for a Repeated
START Condition tSU:STA 0.6 µs
Data Hold Time tHD:DAT (Note 6, 7) 0 0.9 µs
Data Setup Time tSU:DAT (Note 6) 100 ns
Rise Time of Both SDA and
SCL Signals tR 20 + 0.1CB 300 ns
Fall Time of Both SDA and
SCL Signals tF 20 + 0.1CB 300 ns
Setup Time for STOP
Condition tSU:STO 0.6 µs
Spike Pulse Widths
Suppressed by Input Filter tSP (Note 8) 0 50 ns
Capacitive Load for Each Bus
Line CB (Note 9) 400 pF
SCL, SDA Input Capacitance CBIN 60 pF
Note 1: All voltages are referenced to VSS.
Note 2: Offset specified after auto-calibration cycle and Current Offset Bias register = 0x00.
Note 3: The DS2746 enters the sleep mode 1.5s to 2.2s after ( SCL < Vil.) AND ( SDA < Vil ).
Note 4: Timing must be fast enough to prevent the DS2746 from entering sleep mode due to bus low for period > tSLEEP.
Note 5: fSCL must meet the minimum clock low time plus the rise/fall times.
Note 6: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 7: This device internally provides a hold time of at least 100ns for the SDA signal (referred to the VIHmin of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 8: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
Note 9: Cb – total capacitance of one bus line in pF.
Note 10: The AINGERR spec is only valid when this equation is satisfied: (VAINx + 2VOUT) (11.6V - (TA - 25C)10mV/C). See Figure 1.
Note 11: Accuracy specification valid for VSS - SNS ≥ ±2.5mV, below which offset error is dominant.
DS2746 Low-Cost 2-Wire Battery Monitor
Figure 1. Valid Range for AINGERR Accuracy Specification
2.5V3.864.03.74.5V
57%
67%
48%
100%°C0
AINx Voltage Measurement Error≤ AINGERR Specification
AINx Voltage
Measurement Error
Not Specified
VOUT PIN VOLTAGE (V)
AINx
PIN VO
LTAGE A
A PERCENTA
UT (
Figure 2. 2-Wire Bus Timing Diagram
DS2746 Low-Cost 2-Wire Battery Monitor
PIN DESCRIPTION
PIN NAME FUNCTION
1 AIN1 Aux Voltage Input Number 1.
2 AIN0 Aux Voltage Input Number 0.
3 SCL Serial Clock Input. Input only 2-wire clock line. Connect this pin to the CLOCK signal of
the 2-wire interface. This pin has a 0.2µA typical pulldown to sense disconnection.
4 SDA
Serial Data Input / Output. Open drain 2-wire data line. Connect this pin to the DATA
signal of the 2-wire interface. This pin has a 0.2µA typical pulldown to sense
disconnection.
5 SNS Current-Sense Input. Connect to the handset side of the sense resistor.
6 VSS Device Ground. Connect to the battery side of the sense resistor.
7 CTG Connect to Ground. Connect to the battery side of the sense resistor.
8 VOUT Voltage Out. Supply for Aux input voltage Measurement dividers. Connect to high side of
resistor divider circuits.
9 VIN Battery Voltage Input. The voltage of the cell pack is measured through this pin.
10 VDD Power-Supply Input. 2.5V to 4.5V input range. Connect to system power through a
decoupling network.
PAD PAD
Exposed Pad. Connect to VSS.
DS2746 Low-Cost 2-Wire Battery Monitor
Figure 3. Block Diagram
DETAILED DESCRIPTION
The DS2746 operates either in active mode where cell voltage, system current, and auxiliary inputs are monitored,
or in a low power sleep mode to conserve energy when the system is idle. While in active mode, the DS2746
contantly measures current flow through an external sense resistor. Each current measurement is reported with
sign and magnitude in a two-byte Current register. Offset bias and offset blanking features remove offset error from
the current A/D to improve measurement accuracy. Each current measurement is integrated into the Accumulated
Current register (ACR) to maintain a sum of all charge entering and exiting the cell.
The DS2746 has two auxiliary inputs to allow voltage sampling of resistor divider circuits. These can be used to
measure a thermistor or an ID resistor located inside the battery pack. The VOUT output provides the pullup voltage
for the resistor divider networks. The DS2746 disables VOUT after measuring the auxiliary inputs to reduce power
use by the measurement system. VOUT operation can be disabled through software to further reduce power
consumption when the auxiliary inputs are not in use.
A dedicated voltage A/D measures voltage of the cell and the auxiliary inputs. A mux on the input to the A/D cycles
through the VIN, AIN0, and AIN1 pins repeatedly in that order. An internal reference is used to measure VIN voltage.
AIN0 and AIN1 are measured as a percentage of VOUT. This ratiometric measurement of the Auxiliary inputs
prevents noise in the supply from affecting accuracy of the readings
The DS2746 measurements can be used directly to provide accurate fuel gauging in typical use conditions, or
along with FuelPack™ algorithms to form a complete and accurate solution for estimating remaining capacity over
wide temperature and operating conditions.
Through its 2-Wire interface, the DS2746 allows a host system read/write access to the Status/Configuration
register and Measurement registers. If sleep mode operation is enabled, holding both interface lines low forces the
DS2746 into a low power sleep mode where A/D measurements are paused and the ACR register is maintained.
DS2746 Low-Cost 2-Wire Battery Monitor
Figure 4. APPLICATION EXAMPLE
2.5V
RSNS
(1)
10nF
DS2746
AIN0
VINVOUT
AIN1
SDA
VSS
SCL
Pack+
Pack-
System
Serial
Bus
(1) Optional for 8kV/15kV ESD
Protection IC
(Li+/Polymer)
1nF1nF
Therm
PackID
System
VDD
System
VSS
SNS
VDD
(1)5.6V
1K�
CTG
1K�
1K�150�
POWER MODES
The DS2746 operates in one of two power modes: active and sleep. While in active mode, the DS2746 operates as high-precision battery monitor with voltage, auxiliary inputs, current and accumulated current measurements
acquired continuously and the resulting values updated in the measurement registers. Read and write access is
allowed to all registers. In sleep mode, the DS2746 operates in a low-power mode with no measurement activity.
The DS2746 operating mode transitions from SLEEP to ACTIVE when:
( SCL > VIH ) OR ( SDA > VIH )
The DS2746 operating mode transitions from ACTIVE to SLEEP when:
SMOD = 1 AND [ ( SCL < VIL ) AND ( SDA < VIL ) ] for tSLEEP
CAUTION: If SMOD = 1, a pull-up resistor is required on SCL and SDA in order to ensure that the DS2746
transitions from SLEEP to ACTIVE mode when the battery is charged. If the bus is not pulled up, the DS2746
remains in SLEEP and cannot accumulate the charge current.
MEASUREMENT SEQUENCE
The DS2746 uses seperate A/D converters to make voltage and current measurements. Each A/D converter
operates completely independent of the other, allowing measurements of voltage and current to be made in
parallel. Current Measurements are made at a resolution of 13 bits plus sign bit. The current register is updated
every 878ms with the average for that time period.
All Voltage Measurements are made at a resolution of 11 bits plus sign bit. The DS2746 continouly cycles through
measuring VIN, AIN0, and AIN1 in that order. Voltage measurement of each input requires 220ms to complete. A
full sequence of voltage measurements requires 660ms to complete. VOUT is active for a precharge time of tPRE
before the AIN0 measurement time occurs. The VOUT pin is enabled during the entire AIN0 and AIN1 measurement
DS2746 Low-Cost 2-Wire Battery Monitor
Figure 5. Measurement Timing
VOLTAGE MEASUREMENT
Battery voltage is measured at the VIN input with respect to VSS over a range of 0V to 4.997V (limited by VDD pin
voltage) and with a resolution of 2.44mV. The result is updated every 660ms with the average voltage over the last
220ms and placed in the VOLTAGE register in two’s compliment form. Voltages above the maximum register value
are reported as 7FFFh.
Figure 6. Voltage Register Format MSB—Address 0Ch LSB—Address 0Dh
S 210 29 28 27 26 25 24 23 22 21 20 X X X X
MSb LSb MSb LSb
“S”: sign bit(s), “X”: reserved Units: 2.44mV
The input impedance of VIN is sufficiently large (>15M) to be connected to a high impedance voltage divider in
order to support multiple cell applications. The pack voltage should be divided by the number of series cells to
DS2746 Low-Cost 2-Wire Battery Monitor
AUXILARY INPUT MEASUREMENTS
The DS2746 allows for measuring two auxiliary measurement inputs, AIN0 and AIN1, with respect to VSS. These
inputs are designed for measuring resistor ratios, particularly useful for measuring thermistor or pack identification
resistors. At a time of tPRE prior to the beginning of a measurement cycle on AIN0 or AIN1, the VOUT pin puts out a
reference voltage in order to drive a resistive divider formed by a known resistor value, and the unknown resistance
to be measured. Making these measurements ratiometric with respect to VOUT removes reference tolerance from
the error calculations. Each auxiliary input measurement is updated every 660ms with the average voltage over the
220ms conversion period and placed in the AIN0 and AIN1 Registers in two’s complement form. The input
impedances of AIN0 and AIN1 are sufficiently large (>15M) to be connected to a wide range of voltage divider
resistances.
Figure 7. Auxiliary Input Registers Format
AIN0 MSB—Address 08h LSB—Address 09h
S 210 29 28 27 26 25 24 23 22 21 20 X X X X
MSb LSb MSb LSb
“S”: sign bit, “X”: reserved Units: 1LSB = VVOUT * 1/2047
AIN1 MSB—Address 0Ah LSB—Address 0Bh
S 210 29 28 27 26 25 24 23 22 21 20 X X X X
MSb LSb MSb LSb
“S”: sign bit, “X”: reserved Units: 1LSB = VVOUT * 1/2047
CURRENT MEASUREMENT
In the active mode of operation, the DS2746 continually measures the current flow into and out of the battery by
measuring the voltage drop across a low-value current-sense resistor, RSNS, connected between the SNS and VSS
pins. The voltage sense range between SNS and VSS is ±51.2mV. Note that positive current values occur when
VSNS is less than VSS, and negative current values occur when VSNS is greater than VSS. Peak signal amplitudes up
to 102mV are allowed at the input as long as the continuous or average signal level does not exceed ±51.2mV over
the conversion period. The ADC samples the input differentially and updates the current register at the completion
of each conversion. The result is updated every 878ms with the average voltage and placed in the CURRENT
register in two’s compliment form. The current measurement register format is shown in Figure 8 and specifications
for several different sense resistor options are shown in Tables 1 and 2. Charge currents above the maximum
register value are reported at the maximum value (7FFFh = +51.2mV). Discharge currents below the minimum
register value are reported at the minimum value (8000h = -51.2mV).
Figure 8. Current Register Formats MSB—Address 0Eh LSB—Address 0Fh
S 212 211 210 29 28 27 26 25 24 23 22 21 20 X X
MSb LSb MSb LSb
“S”: sign bit Units: 20 = 6.25V/Rsns
