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DS2411P-DS2411X
Silicon Serial Number with VCC Input
FEATURESUnique, Factory-Lasered and Tested 64-Bit
Registration Number (8-Bit Family Code
Plus 48-Bit Serial Number Plus 8-Bit CRCTester); Guaranteed No Two Parts AlikeStandby Current <1µABuilt-In Multidrop Controller Enables
Multiple DS2411s to Reside on a Common
1-Wire� NetworkMultidrop Compatible with Other 1-Wire
Products8-Bit Family Code Identifies Device as
DS2411 to the 1-Wire MasterLow-Cost TSOC, SOT23-3, and Flip-Chip
Surface-Mount PackagesDirectly Connects to a Single-Port Pin of a
Microprocessor and Communicates at up to
15.4kbpsOverdrive Mode Boosts Communication
Speed to 125kbpsOperating Range: 1.5V to 5.25V, -40°C to
+85°C
ORDERING INFORMATION
PIN CONFIGURATION2
TSOC, Top View
PIN DESCRIPTION
DESCRIPTIONThe DS2411 silicon serial number is a low-cost, electronic registration number with external power
supply. It provides an absolutely unique identity that can be determined with a minimal electronic
interface (typically, a single port pin of a microcontroller). The DS2411’s registration number is afactory-lasered, 64-bit ROM that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit
family code (01h). Data is transferred serially through the Dallas Semiconductor’s 1-Wire protocol. The
DS2411
Silicon Serial Number with VCC Input
DS2411
ABSOLUTE MAXIMUM RATINGS*I/O Voltage to GND-0.5V to +6V
VCC Voltage to GND-0.5V to +6V
I/O, VCC Current±20mA
Operating Temperature Range-40°C to +85°C
Junction Temperature+150°CStorage Temperature Range-55°C to +125°C
Soldering Temperature See IPC/JEDEC J-STD-
020A Specification
� This is a stress rating only and functional operation of the device at these or any other conditions abovethose indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
ELECTRICAL CHARACTERISTICS (VCC = 1.5V to 5.25V; TA = -40�C to +85�C.)
DS2411
Note 1:System requirement.
Note 2:Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the
system and 1-Wire recovery times. The specified value here applies to systems with onlyone device and with the minimum 1-Wire recovery times. For more heavily loaded
systems, an active pullup such as that found in the DS2480B may be required. Minimum
allowable pullup resistance is slightly greater than the value necessary to produce the
absolute maximum current (20mA) during 1-Wire low times at VPUP = 5.25V assuming
VOL = 0V.
Note 3:Not production tested.
Note 4: VTL and VTH are functions of VCC and temperature.
Note 5:Voltage below which during a falling edge on I/O, a logic ‘0’ is detected.
Note 6:Voltage above which during a rising edge on I/O, a logic ‘1’ is detected.
Note 7:After VTH is crossed during a rising edge on I/O, the voltage on I/O has to drop by VHY tobe detected as logic ‘0’.
Note 8:The I-V characteristic is linear for voltages less than 1V.
Note 9:The earliest recognition of a negative edge is possible at tREH after VTH has been reached
on the previous edge.
Note 10:Interval during the negative edge on I/O at the beginning of a presence-detect pulse
DS2411
Note 11:� represents the time required for the pullup circuitry to pull the voltage on I/O up VIL to
VTH.
Note 12:� represents the time required for the pullup circuitry to pull the voltage on I/O up fromVIL to the input-high threshold of the bus master.
Note 13:Interval begins when the voltage drops below VTL during a negative edge on I/O and ends
when the voltage rises above VTH during a positive edge on I/O.
OPERATIONThe DS2411’s registration number is accessed through a single data line. The 48-bit serial number, 8-bit
family code, and 8-bit CRC are retrieved using the Dallas 1-Wire protocol. This protocol defines bustransactions in terms of the bus state during specified time slots that are bus-master-generated falling
edges on the I/O pin. All data is read and written least significant bit first. The device requires a delay
between VCC power-up and initial 1-Wire communication, tPWRP (1200�s). During this time the device
may issue presence-detect pulses.
1-Wire BUS SYSTEMThe 1-Wire bus has a single bus master and one or more slaves. In all instances, the DS2411 is a slave
device. The bus master is typically either a microcontroller or a Dallas Semiconductor bridge chip such asthe DS2480, DS2490, or DS1481. The discussion of this bus system is broken down into three topics:
hardware configuration, transaction sequence, and 1-Wire signaling (signal type and timing).
Hardware ConfigurationThe 1-Wire bus has a single data line, I/O. It is important that each device on the bus be able to drive I/Oat the appropriate time. To facilitate this, each device has an open-drain or three-state output. The
DS2411 has an open-drain output with an internal circuit equivalent to that shown in Figure 3. The bus
master can have the same equivalent circuit. If a bidirectional pin is not available on the master, separate
output and input pins can be connected together. The bus requires a pullup resistor at the master end of
the bus, as shown in Figure 4. A multidrop bus consists of a 1-Wire bus with multiple slaves attached.The 1-Wire bus has a maximum data rate of 15.4kbps in standard speed and 125kbps in overdrive.
The idle state for the 1-Wire bus is high. If a transaction needs to be suspended for any reason, I/O must
remain high if the transaction is to be resumed. If the bus is pulled low, slave devices on the bus will
interpret the low as either a timeslot, or a reset depending on the duration.
Figure 1. DS2411 REGISTRATION NUMBERMSBLSB
MSBLSBMSBLSBMSBLSB
DS2411
Figure 2. 1-WIRE CRC GENERATOR
Figure 3. DS2411 EQUIVALENT CIRCUIT
Figure 4. BUS MASTER CIRCUIT
a) Open Drainb) DS2480B Serial Bridge STOP
* ONLY ONE DS9502 ESD PROTECTION DIODE WITH 5V
5V OPERATION ONLY
DS2411
TRANSACTION SEQUENCEThe communication sequence for accessing the DS2411 through the 1-Wire bus is as follows:InitializationROM Function CommandRead Data
INITIALIZATIONAll transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the
slave(s). The presence pulse lets the bus master know that the DS2411 is on the bus and is ready to
operate. For more details, see the 1-Wire Signaling section.
ROM FUNCTION COMMANDSOnce the bus master has detected a presence, it can issue one of the three ROM function commands. All
ROM function command codes are 1 byte long. A list of these commands follows (see the flowchart inFigure 5).
Read ROM [33h]This command allows the bus master to read the DS2411’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command should only be used if there is a single slave device on the bus. If
more than one slave is present on the bus, a data collision results when all slaves try to transmit at the
same time (open drain produces a wired-AND result), and the resulting registration number read by themaster will be invalid.
Search ROM [F0h]When a system is initially brought up, the bus master might not know the number of devices on the1-Wire bus or their registration numbers. By taking advantage of the wired-AND property of the bus, the
master can use a process of elimination to identify the registration numbers of all slave devices. For each
bit of the registration number, starting with the least significant bit, the bus master issues a triplet of time
slots. On the first slot, each slave device participating in the search outputs the true value of its
registration number bit. On the second slot, each slave device participating in the search outputs thecomplemented value of its registration number bit. On the third slot, the master writes the true value of
the bit to be selected. All slave devices that do not match the bit written by the master stop participating
in the search. If both of the read bits are zero, the master knows that slave devices exist with both states of
the bit. By choosing which state to write, the bus master branches in the romcode tree. After one complete
pass, the bus master knows the registration number of a single device. Additional passes identify theregistration numbers of the remaining devices. Refer to App Note 187: 1-Wire Search Algorithm for a
detailed discussion, including an example.
Overdrive Skip ROM [3Ch]This command causes all overdrive-capable slave devices on the 1-Wire network to enter overdrive speed
(OD = 1). All communication following this command has to occur at overdrive speed until a reset pulse
of minimum 480�s duration resets all devices on the bus to regular speed (OD = 0).
To subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed has to be
issued followed by a read ROM or search ROM command sequence. Overdrive speeds up the time for the
search process.
