DS2118M ,Ultra3 LVD/SE SCSI TerminatorFEATURES PIN CONFIGURATION Fully Compliant with SCSI SPI-2, SPI-3, SPI-4, Ultra160, and Ultra32 ..
DS2118MB ,Ultra2 LVD/SE SCSI TerminatorFEATURES PIN CONFIGURATION Fully Compliant with SCSI SPI-2, SPI-3, SPI-4, Ultra160, and Ultra32 ..
DS2118M-B ,Ultra2 LVD/SE SCSI TerminatorFEATURES PIN CONFIGURATION Fully Compliant with SCSI SPI-2, SPI-3, SPI-4, Ultra160, and Ultra32 ..
DS2119M ,Ultra3 LVD/SE SCSI TerminatorFUNCTIONAL DESCRIPTION The DS2119 combines LVD and SE termination with DIFFSENS sourcing and detect ..
DS2119M+ ,Ultra3 LVD/SE SCSI Terminator DS2119M Ultra3 LVD/SE SCSI Terminator PIN CONFIGURATION
DS2119ME ,Ultra3 LVD/SE SCSI TerminatorFUNCTIONAL DESCRIPTION The DS2119 combines LVD and SE termination with DIFFSENS sourcing and detect ..
DS2118M
Ultra3 LVD/SE SCSI Terminator
FEATURES � Fully Compliant with SCSI SPI-2, SPI-3,
SPI-4, Ultra160, and Ultra320 � Provides Multimode Low-Voltage
Differential/Single-Ended (LVD/SE)
Termination for Nine Signal Line Pairs � Autoselection of LVD or SE Termination � 5% Tolerance on SE and LVD Termination
Resistance � Low Power-Down Capacitance of 3pF � On-Board Thermal Shutdown Circuitry � SCSI Bus Hot-Plug Compatible � Fully Supports Actively Negated SE SCSI
Signals
PIN CONFIGURATION
ORDERING INFORMATION
PART VOLTAGE
(V) TEMP RANGE PIN-PACKAGE TOP MARK* DS2118MB 5 0°C to +70°C 36 SSOP (0.300") DS2118MB
DS2118MB+ 5 0°C to +70°C 36 SSOP (0.300") DS2118MB
DS2118MB/T&R 5 0°C to +70°C 36 SSOP (0.300")/Tape and
Reel DS2118MB
DS2118MB+T&R 5 0°C to +70°C 36 SSOP (0.300")/Tape
and Reel DS2118MB
+ Denotes a lead-free/RoHS-compliant package.
* The top mark includes a "+" on lead-free packages.
DS2118M
Ultra3 LVD/SE SCSI Terminator
32
35
34
33
31
30
29
28
27
26
25
24
LVD
SE
R9N
R8N
R8P
HS GND
HS GND
HS GND
R7N
R7P
R6N
R9P
R1P
R1N
R2N
HS GND
HS GND
R3P
R3N
R4P
R4N
R2P
SSOP 36
23
VREF
TPWR
HVD
HS GND
22
21
20
19
R5P
R5N
ISO
GND
DIFF_CAP
DIFFSENSE
MSTR/SLV
R6P
DS2118M
DS2118M
DETAILED DESCRIPTION The DS2118M Ultra3 LVD/SE SCSI terminator is both a low-voltage differential (LVD) and single-
ended (SE) terminator. The multimode operation enables the designer to implement LVD in current
products while allowing the end-user SE-backward compatibility with legacy devices. If the device is
connected in an LVD-only bus, the DS2118M will use LVD termination. If any SE devices are connected
to the bus, the DS2118M will use SE termination. This is accomplished automatically inside the part by
sensing the voltage on the SCSI bus DIFFSENS line.
For the LVD termination, the DS2118M integrates two current sources with nine precision resistor
strings. For the SE termination, one regulator and nine precision 110Ω resistors are used. Three
DS2118M terminators are needed for a wide SCSI bus.
REFERENCE DOCUMENTS Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface (SPI) Project: 0855-M, 1995
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 2 (SPI-2) Project: 1142-M, 1998
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 3 (SPI-3) Project: 1302-D, 1999
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 4 (SPI-4) Project: 1365-D, 200x
Available From: American National Standards Institute (ANSI) Phone: (212) 642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: (800) 854-7179
DS2118M
FUNCTIONAL DESCRIPTION The DS2118 combines LVD and SE termination with DIFFSENSE sourcing and detection.
A bandgap reference is fed into two amplifiers, which creates a 1.25V reference voltage and a 2.85V
reference voltage. The control logic determines which of these references will be applied to the
termination resistors. If the SCSI bus is in LVD mode, then the 1.25V reference will be used. If the SCSI
bus is in SE mode, then the 2.85V reference will be used. That same control logic will switch in/out
parallel resistors to change the total termination resistance accordingly. Finally, in SE mode the Rp pins
will be switched to ground.
The DIFFSENSE circuitry decodes trinary logic. There will be one of three voltages on the SCSI control
line called DIFFSENS. Two comparators and a NAND gate determine if the voltage is below 0.6V, above
2.15V, or in between. That indicates the mode of the bus to be HVD, SE, or LVD, respectively.
The DS2118M’s DIFF_CAP pin monitors the DIFFSENS line to determine the proper operating mode of
the device; this mode is indicated by the SE/LVD/HVD outputs. The DIFFSENSE pin can also drive the
SCSI DIFFSENS line (when MSTR/SLV = 1) to determine the SCSI bus operating mode. The DS2118M
switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS
voltage. These modes are: � LVD Mode: LVD termination is provided by a precision laser-trimmed resistor string with two
amplifiers. This configuration yields a 105Ω differential and 150Ω common-mode impedance. A
fail-safe bias of 112mV is maintained when no drivers are connected to the SCSI bus. � SE Mode: When the external driver for a given signal line turns off, the active terminator will
pull that signal line to 2.85V (quiescent state). When used with an active negation driver, the
power amp can sink 22mA per line while keeping the voltage reference in regulation. The
terminating resistors maintain their 110Ω value. � HVD Isolation Mode: The DS2118M identifies that there is an HVD (high-voltage differential)
device on the SCSI bus and isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus, VREF remains active, and
the bus mode indicators (SE/LVD/HVD) remain active. During thermal shutdown, the termination pins
are isolated from the SCSI bus, VREF becomes high impedance, and the bus mode indicators
(SE/LVD/HVD) remain active. The DIFFSENSE driver is shut down during either of these two events.
An internal pulldown resistor assures that the DS2118M will be terminating the bus if the ISO pin is left
floating.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2µF capacitor
and a 0.01µF high-frequency capacitor is recommended between TPWR and ground and placed as close
as possible to the DS2118M. The DS2118M should be placed as close as possible to the SCSI connector
to minimize signal and power-trace length, thereby resulting in less input capacitance and reflections,
which can degrade the bus signals.
DS2118M
VREF pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown in
Figure 2.
NOTES: 1) DIFFSENS. Refers to the SCSI bus signal.
2) DIFFSENSE. Refers to the DS2118M pin name and internal circuitry capable of driving the
DIFFSENS line.
3) DIFF_CAP. Refers to the DS2118M pin name and internal circuitry relating to monitoring the
DIFFSENS line.
DS2118M
Figure 1. DS2118M Block Diagram DS2118M
Figure 2. SCSI Bus Configuration
