DS1994L-F5+ ,iButton 4Kb Memory Plus TimeFEATURES 4096 bits of Read/Write Nonvolatile Memory Unique, Factory-Lasered, and Tested 64-bit ..
DS1995L-F5 ,16-kbit Memory iButtonDS1995TM16-kbit Memory iButtonwww.dalsemi.com§ Meets UL#913 (4th Edit.); Intrinsically SafeSPECIAL
DS1995L-F5 ,16-kbit Memory iButtonFEATURESApparatus, approved under Entity Concept§ 16384 bits of read/write nonvolatile memoryfor us ..
DS1996L/F5+ ,iButton 64Kb MemoryFEATURES registration number withstands harsh Unique, factory-lasered and tested 64-bit environme ..
DS1996L-F5 ,64kbit Memory iButtonTMFEATURES§ Unique, factory-lasered and tested 64-bit§ Easily affixed with self-stick adhesiveregistr ..
DS1E-ML2-DC3V , HIGHLY SENSITIVE 1500 V FCC SURGE WITHSTANDING MINIATURE RELAY
DS1994L-F5+
iButton 4Kb Memory Plus Time
19-5049; 11/09
DS1994
DS1994
4Kb Plus Time Memory iButton®
SPECIAL FEATURES 4096 bits of Read/Write Nonvolatile Memory 256-bit Scratchpad Ensures Integrity of Data
Transfer Memory Partitioned into 256-bit Pages for
Packetizing Data Data Integrity Assured with Strict Read/Write
Protocols Contains Real-Time Clock/Calendar in Binary
Format Interval Timer Can Automatically Accumulate
Time When Power is Applied Programmable Cycle Counter can Accumulate
the Number of System Power-On/Off Cycles Programmable Alarms Can Be Set to Generate
Interrupts for Interval Timer, Real-Time
Clock, and/or Cycle Counter Write-Protect Feature Provides Tamperproof
Time Data Programmable Expiration Date That Limits
Access to SRAM and Timekeeping Clock Accuracy is Better Than ±2 Minutes/
Month at 25°C Operating Temperature Range from -40°C to
+70°C Over 10 Years of Data Retention
F5 MicroCan
COMMON iButton FEATURES Unique, Factory-Lasered, and Tested 64-bit
Registration Number (8-bit Family Code +
48-bit Serial Number + 8-bit CRC Tester)
Assures Absolute Traceability Because No
Two Parts Are Alike Multidrop Controller for 1-Wire Network Digital Identification and Information by
Momentary Contact Chip-Based Data Carrier Compactly Stores
Information Data Can Be Accessed While Affixed to
Object Economically Communicates to Bus Master
with a Single Digital Signal at 16.3kbps Standard 16mm Diameter and 1-Wire®
Protocol Ensure Compatibility with iButton
Family Button Shape is Self-Aligning with Cup-
Shaped Probes Durable Stainless Steel Case Engraved with
Registration Number Withstands Harsh
Environments Easily Affixed with Self-Stick Adhesive
Backing, Latched by its Flange, or Locked
with a Ring Pressed onto its Rim Presence Detector Acknowledges when
Reader First Applies Voltage Meets UL#913 (4th Edit.); Intrinsically Safe
Apparatus, Approved under Entity Concept
for Use in Class I, Division 1, Group A, B, C
and D Locations
ORDERING INFORMATION DS1994L-F5+ F5 MicroCan
+Denotes a lead(Pb)-free/RoHS-compliant package.
EXAMPLES OF ACCESSORIES DS9096P Self-Stick Adhesive Pad
DS9101 Multi-Purpose Clip
DS9093RA Mounting Lock Ring
DS9093F Snap-In Fob
DS1994
iButton DESCRIPTION The DS1994 Memory iButton is a rugged read/write data carrier that acts as a localized database, easily
accessible with minimal hardware. The nonvolatile memory and optional timekeeping capability offer a
simple solution to storing and retrieving vital information pertaining to the object to which the iButton is
attached. Data is transferred serially through the 1-Wire protocol that requires only a single data lead and
a ground return.
The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to
the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command
transfers the data to memory. This process ensures data integrity when modifying the memory. A 48-bit
serial number is factory lasered into each DS1994 to provide a guaranteed unique identity that allows for
absolute traceability. The durable MicroCan package is highly resistant to environmental hazards such as
dirt, moisture, and shock. Its compact, coin-shaped profile is self-aligning with mating receptacles,
allowing the DS1994 to be easily used by human operators. Accessories permit the DS1994 to be
mounted on almost any surface including plastic key fobs, photo-ID badges, and PC boards.
The DS1994 also includes time-keeping functions, a real-time clock/calendar, interval timer, cycle
counter, and programmable interrupts, in addition to the nonvolatile memory. The internal clock can be
programmed to deny memory access based on absolute time/date, total elapsed time, or the number of
accesses. These features allow the DS1994 to be used to create a stopwatch, alarm clock, time and date
stamp, logbook, hour meter, calendar, system power cycle timer, interval timer, and event scheduler.
OPERATION The DS1994 has four main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad, 3) 4096-bit
SRAM, and 4) timekeeping registers. The timekeeping section utilizes an on-chip oscillator that is
connected to a 32.768kHz crystal. The SRAM and time-keeping registers reside in one contiguous
address space referred to hereafter as memory. All data is read and written least significant bit first.
The memory functions are not available until the ROM function protocol has been established. This
protocol is described in the ROM functions flowchart (Figure 9). The master must first provide one of
four ROM function commands: 1) read ROM, 2) match ROM, 3) search ROM, or 4) skip ROM. After a
ROM function sequence has been successfully executed, the memory functions are accessible and the
master can then provide any one of the four memory function commands (Figure 6).
DS1994
Figure 1. DS1994 BLOCK DIAGRAM SRAM
TIMEKEEPING
HOLDING REGISTERS
FUNCTIONS
16 PAGES
oF 256-BITS
PAGES
& COUNTERS
INTERNAL REGISTERS
32.768 kHz
OSCILLATOR
256-BIT
SCRATCHPAD
1-W
ROM
CONTROL
FUNCTION
64-BIT
ROM
LASERED
PARASITE-
CIRCUITR
1-WIRE
PORT
POWERED
MEMORY
FUNCTION
CONTROL
3V LITHIUM
PARASITE POWER The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry steals power whenever
the data input is high. The data line provides sufficient power as long as the specified timing and voltage
requirements are met. The advantages of parasite power are two-fold: 1) by parasiting off this input,
battery power is not consumed for 1-Wire ROM function commands, and 2) if the battery is exhausted for
any reason, the ROM may still be read normally. The remaining circuitry of the DS1994 is solely
operated by battery energy.
64-BIT LASERED ROM Each DS1994 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.
The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. (See Figure 2.)
The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates,
as shown in Figure 3. The polynomial is X8 + X5 + X4 + 1. Additional information about the 1-Wire
Cyclic Redundancy Check is available in Application Note 27: Understanding and Using Cyclic
Redundancy Checks with Maxim iButton Products. The shift register bits are initialized to zero. Then
starting with the least significant bit of the family code, 1 bit at a time is shifted in. After the 8th bit of the
family code has been entered, then the serial number is entered. After the 48th bit of the serial number has
been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC should return the
shift register to all zeros.
Figure 2. 64-BIT LASERED ROM MSB LSB
8-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (04h)
DS1994
Figure 3. 1-WIRE CRC CODE Polynomial = X8 + X5 + X4 + 10X1X2X3X4X5X6X7X8st
STAGEnd
STAGErd
STAGEth
STAGEth
STAGEth
STAGEth
STAGEth
STAGE
INPUT DATA
MEMORY The memory map in Figure 4 shows a 32-Byte page called the scratchpad, and additional 32-Byte pages
called memory. The DS1994 contains 16 pages that make up the 4096-bit SRAM. The DS1994 also
contains page 16, which has only 30 Bytes containing the timekeeping registers.
The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to
the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command
transfers the data to memory. This process ensures data integrity when modifying the memory.
TIMEKEEPING A 32.768kHz crystal oscillator is used as the time base for the timekeeping functions. The oscillator can
be turned on or off by an enable bit in the control register. The oscillator must be on for the real-time
clock, interval timer, and cycle counter to function.
The timekeeping functions are double buffered. This feature allows the master to read time or count
without the data changing while it is being read. To accomplish this, a snapshot of the counter data is
transferred to holding registers that the user accesses. This occurs after the 8th bit of the read memory
function command.
Real-Time Clock The real-time clock is a 5-Byte binary counter. It is incremented 256 times per second. The least
significant Byte is a count of fractional seconds. The upper 4 Bytes are a count of seconds. The real-time
clock can accumulate 136 years of seconds before rolling over. Time/date is represented by the number of
seconds since a reference point, which is determined by the user. For example, 12:00 A.M., January 1,
1970 could be a reference point.
DS1994
Figure 4. DS1994 MEMORY MAP PAGE 0
PAGE
PAGE 1
PAGE 2
PAGE 3
PAGE 4
PAGE 5
PAGE 6
PAGE 7
PAGE 8
PAGE 9
PAGE 10
PAGE 11
PAGE 12
PAGE 13
PAGE 14
PAGE 15
PAGE 16
SCRATCHPAD
MEMORY
0000h
0020h
0040h
0060h
0080h
00A0h
00C0h
00E0h
0100h
0120h
0140h
0160h
0180h
01A0h
01C0h
01E0h
0200h
NOTE: Each page is 32 bytes (256 bits). The hex values
represent the starting address for each page or register.
PAGE 16
TIMEKEEPING REGISTERS
STATUS REGISTER
CONTROL REGISTER
REAL-TIME
COUNTER REGISTERS
INTERVAL TIME
COUNTER REGISTERS
COUNTER REGISTERS
CYCLE
ALARM REGISTERS
ALARM REGISTERS
LARM REGISTERS
CYCLE
INTERVAL TIME
REAL-TIME
0200h
0201h
0202h
0207h
020Ch
0210h
0215h
021AhA
0200h
0201h
STATUS REGISTER
CONTROL REGISTER543210543210XCCEITERTECCFITFRTF
DSELSTOP
START
AUTO
MANOSCROWPCWPIWPR
